A 7MB/s 64Gb 3-bit/cell DDR NAND flash memory in 20nm-node technology. - Ki-Tae Park; Ohsuk Kwon; Sangyong Yoon; Myung-Hoon Choi; In-Mo Kim; Bo-Geun Kim; Min-Seok Kim; Yoon-Hee Choi; Seung-Hwan Shin; Youngson Song; Joo-Yong Park; Jae-Eun Lee; et al. (ISSCC, 2011)

Intelligent M2M network using healthcare sensors. - Seung-Hwan Shin; Rossi Kamal; Rim Haw; Seung Il Moon; Choong Seon Hong; Mi-Jung Choi (APNOMS, 2012)

A new 3-bit programming algorithm using SLC-to-TLC migration for 8MB/s high performance TLC NAND flash memory. - Seung-Hwan Shin; Dong-Kyo Shim; Jaeyong Jeong; Ohsuk Kwon; Sangyong Yoon; Myung-Hoon Choi; Tae-Young Kim; Hyun Wook Park; Hyun-Jun Yoon; Youngsun Song; Yoon-Hee Choi; Sang-Won Shim; et al. (VLSIC, 2012)