Seung-Yeob Baek

According to our database, Seung-Yeob Baek authored at least 4 papers between 2013 and 2021.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2021

A 12b 600MS/s Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET.

Seung-Yeob Baek, Il-Hoon Jang, Michael Choi, Hyungdong Roh, Woongtaek Lim, Youngjae Cho, Jongshin Shin

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020

6.4 A 56Gb/s 7.7mW/Gb/s PAM-4 Wireline Transceiver in 10nm FinFET Using MM-CDR-Based ADC Timing Skew Control and Low-Power DSP with Approximate Multiplier.

Byoung-Joo Yoo, Dong-Hyuk Lim, Hyonguk Pang, June-Hee Lee, Seung-Yeob Baek, Naxin Kim, Dong-Ho Choi, Young-Ho Choi, Hyeyeon Yang, Taehun Yoon, Sang-Hyeok Chu, Kangjik Kim, Woochul Jung, Bong-Kyu Kim, Jaechol Lee, Gunil Kang, Sang-Hune Park, Michael Choi, Jongshin Shin

Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018

A 4.2-mW 10-MHz BW 74.4-dB SNDR Continuous-Time Delta-Sigma Modulator With SAR-Assisted Digital-Domain Noise Coupling.

Il-Hoon Jang, Min-Jae Seo, Sang-Hyun Cho, Jae-Keun Lee, Seung-Yeob Baek, Sunwoo Kwon, Michael Choi, Hyung-Jong Ko, Seung-Tak Ryu

IEEE J. Solid State Circuits, 2018

2013

An 88-dB Max-SFDR 12-bit SAR ADC With Speed-Enhanced ADEC and Dual Registers.

Seung-Yeob Baek, Jae-Kyum Lee, Seung-Tak Ryu

IEEE Trans. Circuits Syst. II Express Briefs, 2013