An energy- and performance-aware DRAM cache architecture for hybrid DRAM/PCM main memory systems. - Hyung Gyu Lee; Seungcheol Baek; Chrysostomos Nicopoulos; Jongman Kim (ICCD, 2011)

A dual-phase compression mechanism for hybrid DRAM/PCM main memory architectures. - Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Jongman Kim (ACM Great Lakes Symposium on VLSI, 2012)

A Compression-Based Hybrid MLC/SLC Management Technique for Phase-Change Memory Systems. - Hyung Gyu Lee; Seungcheol Baek; Jongman Kim; Chrysostomos Nicopoulos (ISVLSI, 2012)

ECM: Effective Capacity Maximizer for high-performance compressed caching. - Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Junghee Lee; Jongman Kim (HPCA, 2013)

Designing Hybrid DRAM/PCM Main Memory Systems Utilizing Dual-Phase Compression. - Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Jongman Kim (ACM Trans. Design Autom. Electr. Syst., 2014)

High-performance memory system architectures using data compression. - Seungcheol Baek (2014)

Size-Aware Cache Management for Compressed Cache Architectures. - Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Junghee Lee; Jongman Kim (IEEE Trans. Computers, 2015)

HoPE: Hot-Cacheline Prediction for Dynamic Early Decompression in Compressed LLCs. - Jaehyun Park 005; Seungcheol Baek; Hyung Gyu Lee; Chrysostomos Nicopoulos; Vinson Young; Junghee Lee; Jongman Kim (ACM Trans. Design Autom. Electr. Syst., 2017)

Enhancing Computation Efficiency in Large Language Models through Weight and Activation Quantization. - Janghwan Lee; Minsoo Kim; Seungcheol Baek; Seok Joong Hwang; Wonyong Sung; Jungwook Choi (EMNLP, 2023)

IANUS: Integrated Accelerator based on NPU-PIM Unified Memory System. - Minseok Seo; Xuan Truong Nguyen; Seok Joong Hwang; Yongkee Kwon; Guhyun Kim; Chanwook Park; Ilkon Kim; Jaehan Park; Jeongbin Kim 001; Woojae Shin; Jongsoon Won; Haerang Choi; et al. (ASPLOS (3), 2024)