A 6b 48-GS/s Asynchronous 2b/cycle Time-Interleaved ADC in 28-nm CMOS. - Hong-Seok Choi; Seungha Roh; Sanghee Lee 002; Jung-Hoon Park; Kwanghoon Lee; Young-Ha Hwang; Deog-Kyoon Jeong (ISOCC, 2021)

A Maximum Eye Tracking Clock-and-Data Recovery Scheme with Golden Section Search(GSS) Algorithm in 28-nm CMOS. - Seungha Roh; Moon-Chul Choi; Deog-Kyoon Jeong (ISOCC, 2021)

A 2.5-32 Gb/s Gen 5-PCIe Receiver With Multi-Rate CDR Engine and Hybrid DFE. - Moon-Chul Choi; Sanghee Lee 002; Seungha Roh; Kwangho Lee; Jonghyun Oh; Sungwoo Kim 001; Kwandong Kim; Woo-Seok Choi; Jaeha Kim; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 64-Gb/s PAM-4 Receiver With Transition-Weighted Phase Detector. - Seungha Roh; Kwangho Lee; Minkyo Shim; Moon-Chul Choi; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 14-28 Gb/s Reference-less Baud-rate CDR with Integrator-based Stochastic Phase and Frequency Detector. - Woosong Jung; Minkyo Shim; Seungha Roh; Deog-Kyoon Jeong (ISCAS, 2023)

A 1.1-pJ/b 8-to-16-Gb/s Receiver With Stochastic CTLE Adaptation. - Minkyo Shim; Kwang-Hoon Lee; Seungha Roh; Kwanseo Park; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

An 80-Gb/s PAM-4 Simultaneous Bidirectional Transceiver With Hybrid Adaptation Scheme. - Yunhee Lee; Minkyo Shim; Seungha Roh; Woonghee Lee 005; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 0.99-pJ/b 10-Gb/s Receiver With Fast Recovery From Sleep Mode Under Voltage Drift. - Kwang-Hoon Lee; Jung-Hun Park; Yongjae Lee; Yeonggeun Song; Seungha Roh; Minkyo Shim; Yoonho Song; Woosong Jung; Young-Ha Hwang; Jonghyun Oh; Woo-Seok Choi; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 50-Gb/s PAM-4 Receiver With Adaptive Phase-Shifting CDR in 28-nm CMOS. - Minkyo Shim; Seungha Roh; Yunhee Lee; Jung-Woo Sull; Deog-Kyoon Jeong; Kwanseo Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A 0.09-pJ/b/dB 28-Gb/s Digital CDR With ISI-Resistant Phase Detector. - Suil Kang; Dongwoo Kang; Sinho Lee; Minkyo Shim; Seungha Roh; Sunjin Choi; Kwanseo Park (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Low-Jitter Phase Detection Technique With Asymmetric Weights in Multi-Level Baud-Rate CDR. - Seungha Roh; Minkyo Shim; Yoojin Jung; Deog-Kyoon Jeong; Kwanseo Park (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)