A Multimode 157μW 4-Channel 80dBA-SNDR Speech-Recognition Frontend With Self-DOA Correction Adaptive Beamformer. - Taewook Kang; Seungjong Lee; Seungheun Song; Mohammad R. Haghighat; Michael P. Flynn (ISSCC, 2022)

An 8-bit 20.7 TOPS/W Multi-Level Cell ReRAM-based Compute Engine. - Justin M. Correll; Lu Jie 001; Seungheun Song; Seungjong Lee; Junkang Zhu; Wei Tang 010; Luke Wormald; Jack Erhardt; Nicolas Breil; Roger Quon; Deepak Kamalanathan; Siddarth A. Krishnan; et al. (VLSI Technology and Circuits, 2022)

An 81.6dB SNDR 15.625MHz BW 3rd Order CT SDM with a True TI NS Quantizer. - Seungjong Lee; Taewook Kang; Seungheun Song; Kyumin Kwon; Michael P. Flynn (VLSI Technology and Circuits, 2022)

A 150-MS/s Fully Dynamic SAR-Assisted Pipeline ADC Using a Floating Ring Amplifier and Gain-Enhancing Miller Negative-C. - Seungheun Song; Taewook Kang; Seungjong Lee; Michael P. Flynn (VLSI Technology and Circuits, 2023)

An 81.6 dB SNDR 15.625 MHz BW Third-Order CT SDM With a True Time-Interleaving Noise-Shaping Quantizer. - Seungjong Lee; Taewook Kang; Seungheun Song; Kyumin Kwon; Michael P. Flynn (IEEE J. Solid State Circuits, 2023)

A Multimode 157 μW 4-Channel 80 dBA-SNDR Speech Recognition Frontend With Direction-of-Arrival Correction Adaptive Beamformer. - Taewook Kang; Seungjong Lee; Seungheun Song; Mohammad Reza Haghighat; Michael P. Flynn (IEEE J. Solid State Circuits, 2024)

A Digital-Sampling PLL With a Second-Order Noise Shaping SAR ADC Phase Detector. - Matthew R. Belz; Zhengqi Xu; Hsiang-Wen Chen; Seungheun Song; Michael P. Flynn (IEEE J. Solid State Circuits, 2025)

An 8-bit 20.7 TOPS/W Multilevel Cell ReRAM Macro With ADC-Assisted Bit-Serial Processing. - Justin M. Correll; Lu Jie 001; Seungheun Song; Seungjong Lee; Junkang Zhu; Wei Tang 010; Luke Wormald; Jack Erhardt; Nicolas Breil; Roger Quon; Deepak Kamalanathan; Siddarth A. Krishnan; et al. (IEEE J. Solid State Circuits, 2025)