A quantization noise cancelling fractional-N type ΔΣ frequency synthesizer using SAR-based DAC gain calibration. - Seungjin Kim; In-Young Lee; Joo-Myoung Kim; Sang-Gug Lee 001 (CICC, 2012)

A low power low inaccuracy linearity-compensated temperature sensor for attachable medical devices. - Oh-Yong Jung; Seungjin Kim; Seok-Kyun Han; Sang-Gug Lee 001 (ISCAS, 2013)

A Low-Noise Four-Stage Voltage-Controlled Ring Oscillator in Deep-Submicrometer CMOS Technology. - Joo-Myoung Kim; Seungjin Kim; In-Young Lee; Seok-Kyun Han; Sang-Gug Lee 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

3.7 A fully integrated TV tuner front-end with 3.1dB NF, >+31dBm OIP3, >83dB HRR3/5 and >68dB HRR7. - In-Young Lee; Sang-Sung Lee; Donggu Im; Seungjin Kim; Jeongki Choi; Sang-Gug Lee 001; Jinho Ko (ISSCC, 2014)

A Blocker-Tolerant Direct Sampling Receiver for Wireless Multi-Channel Communication in 14nm FinFET CMOS. - Barosaim Sung; Chilun Lo; Jaehoon Lee 005; Sangdon Jung; Seungjin Kim; Jaehong Jung; Seungyong Bae; Youngsea Cho; Yong Lim; Dooseok Choi; Myeongcheol Shin; Soonwoo Choi; et al. (A-SSCC, 2019)

Development of Web-Based Management System and Dataset for Radiology-Common Data Model (R-CDM) and Its Clinical Application in Liver Cirrhosis. - Seungjin Kim; Chang-Won Jeong; Tae-Hoon Kim; Chung-Sub Lee; Si-Hyeong Noh; Ji-Eon Kim; Kwon-Ha Yoon (IntelliSys (3), 2020)

Discrimination of Chronic Liver Disease in Non-contrast CT Images using CNN-Deep Learning. - Tae-Hoon Kim; Si-Hyeong Noh; Chang-Won Jeong; Chung-Sub Lee; Ji-Eon Kim; Seungjin Kim; Kwon-Ha Yoon (IntelliSys (3), 2020)

Analysis and Classification of Urinary Stones Using Deep Learning Algorithm: A Clinical Application of Radiology-Common Data Model (R-CDM) Data Set. - Si-Hyeong Noh; Seungjin Kim; Ji-Eon Kim; Chung-Sub Lee; Seng Chan You; Tae-Hoon Kim; Yun Oh Lee; Ilseok Chae; Rae Woong Park; Sung Bin Park; Kwon-Ha Yoon; Chang-Won Jeong (IntelliSys (3), 2020)

30.2 NB-IoT and GNSS All-in-One System-on-Chip Integrating RF Transceiver, 23dBm CMOS Power Amplifier, Power Management Unit and Clock Management System for Low-Cost Solution. - Jongsoo Lee; Jae-Yeol Han; Chilun Lo; Jongmi Lee; Wan Kim; Seungjin Kim; Byoungjoong Kang; Juyoung Han; Sangdon Jung; Takahiro Nomiyama; Jongwoo Lee; Thomas Byunghak Cho; et al. (ISSCC, 2020)

A 4GHz 0.73psrms-Integrated-Jitter PVT-Insensitive Fractional-N Sub-Sampling Ring PLL with a Jitter-Tracking DLL-Assisted DTC. - Jaehong Jung; Sangdon Jung; Kyungmin Lee; Jun-Hee Jung; Seungjin Kim; Byungki Han; Seunghyun Oh; Jongwoo Lee (VLSI Circuits, 2020)

60-V Non-Inverting Four-Mode Buck-Boost Converter With Bootstrap Sharing for Non-Switching Power Transistors. - Jiho Moon; Jaeseong Lee 001; Seungjin Kim; Gyeongha Ryu; Ju-Pyo Hong; Juhyun Lee; Haifeng Jin; Jeongjin Roh (IEEE Access, 2020)

NB-IoT and GNSS All-In-One System-On-Chip Integrating RF Transceiver, 23-dBm CMOS Power Amplifier, Power Management Unit, and Clock Management System for Low Cost Solution. - Jongsoo Lee; Jae-Yeol Han; Chilun Lo; Jongmi Lee; Wan Kim; Seungjin Kim; Byoungjoong Kang; Juyoung Han; Sangdon Jung; Takahiro Nomiyama; Jongwoo Lee; Thomas Byunghak Cho; et al. (IEEE J. Solid State Circuits, 2020)

Dynamic Impacts of Aspects of Appearance and Technology on Consumer Satisfaction: Empirical Evidence from the Smartphone Market. - Seungjin Kim; Sotaro Katsumata; Atsushi Akiike (Rev. Socionetwork Strateg., 2020)

A 52MHz -158.2dBc/Hz PN @ 100kHz Digitally Controlled Crystal Oscillator Utilizing a Capacitive-Load-Dependent Dynamic Feedback Resistor in 28nm CMOS. - Jaehong Jung; Seungjin Kim; Wonkang Kim; Jae-Yeol Han; Euiyoung Park; Seongwook Hwang; Seunghyun Oh; Sangwook Han; Kyungsoo Lee; Junho Huh; Jongwoo Lee (ISSCC, 2022)

A Single-Crystal-Oscillator-Based Clock-Management IC with 18× Start-Up Time Reduction and 0.68ppm/ºC Duty-Cycled Machine-Learning-Based RCO Calibration. - Jaehong Jung; Seunghyun Oh; Joo-Myoung Kim; Gihyeok Ha; Jinhyeon Lee; Seungjin Kim; Euiyoung Park; Jaehoon Lee 005; Yelim Yoon; Seungyong Bae; Wonkang Kim; Yong Lim; et al. (ISSCC, 2022)

A Wide Frequency Range, Small Area and Low Supply Memory Interface PLL Using a Process and Temperature Variation Aware Current Reference in 3 nm Gate-All Around CMOS. - Kyungmin Lee; Jaehong Jung; Gyusik Kim; Joomyoung Kim; Seungjin Kim; Seunghyun Oh; Sung Min Park 001; Jongwoo Lee (A-SSCC, 2023)

A 2.4-to-4.2GHz 440.2fsrms-Integrated-Jitter 4.3mW Ring-Oscillator-Based PLL Using a Switched-Capacitor-Bias-Based Sampling PD in 4nm FinFET CMOS. - Jaehong Jung; Kyungmin Lee; Gunwoo Kong; Baekmin Lim; Seungjin Kim; Seunghyun Oh; Jongwoo Lee (VLSI Technology and Circuits, 2023)

A 208-MHz, 0.75-mW Self-Calibrated Reference Frequency Quadrupler for a 2-GHz Fractional-N Ring-PLL in 4-nm FinFET CMOS. - Kyungmin Lee; Jaehong Jung; Seungjin Kim; Seunghyun Oh; Jongwoo Lee; Sung Min Park 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 2.8-to-7.2GT/s DDR5 Registering Clock Driver IC with Parallel-Data Timing and Pin-to-Pin Skew Calibration for a Dual In-Line Memory Module. - Joomyoung Kim; Jaehong Jung; Kwangmin Lim; Barosaim Sung; Jaekwon Kim; Baekmin Lim; Tae-Gun Noh; Jaehoon Lee 005; Hyun-Gi Seok; Youngsea Cho; Gyusik Kim; Takahiro Nomiyama; et al. (A-SSCC, 2024)

A Fully Integrated, Low-Noise, Cost-Effective Single-Crystal-Oscillator-Based Clock Management IC in 28-nm CMOS. - Jaehong Jung; Seunghyun Oh; Joomyoung Kim; Jinhyeon Lee; Wonkang Kim; Euiyoung Park; Seungyong Bae; Seungjin Kim; Jaehoon Lee 005; Yelim Youn; Yeongcheol Jeong; Sungsik Park; et al. (IEEE J. Solid State Circuits, 2024)

Study on the Measurement Method of Interface Resistance in HBM-DRAM: Novel Monitoring Method for Bump Contact Resistance. - Sanghyeon Jeon; Ilgeun Jung; Seungjin Kim; Sangki Kim; Yangkeun Park; Seungbum Kim; Boyoung Song; Hyodong Ban (IRPS, 2025)