A 16Gb 3b/ Cell NAND Flash Memory in 56nm with 8MB/s Write Rate. - Yan Li; Seungpil Lee; Yupin Fong; Feng Pan; Tien-Chien Kuo; Jong Park; Tapan Samaddar; Hao Nguyen; Man Mui; Khin Htoo; Teruhiko Kamei; Masaaki Higashitani; et al. (ISSCC, 2008)

A 113mm2 32Gb 3b/cell NAND flash memory. - Takuya Futatsuyama; Norihiro Fujita; Naoya Tokiwa; Yoshihiko Shindo; Toshiaki Edahiro; Teruhiko Kamei; Hiroaki Nasu; Makoto Iwai; Koji Kato; Yasuyuki Fukuda; Naoaki Kanagawa; Naofumi Abiko; et al. (ISSCC, 2009)

A 5.6MB/s 64Gb 4b/Cell NAND Flash memory in 43nm CMOS. - Cuong Trinh; Noboru Shibata; Takeshi Nakano; Mikio Ogawa; Jumpei Sato; Yoshikazu Takeyama; Katsuaki Isobe; Binh Le; Farookh Moogat; Nima Mokhlesi; Kenji Kozakai; Patrick Hong; et al. (ISSCC, 2009)

A 16 Gb 3-Bit Per Cell (X3) NAND Flash Memory on 56 nm Technology With 8 MB/s Write Rate. - Yan Li; Seungpil Lee; Yupin Fong; Feng Pan; Tien-Chien Kuo; Jongmin Park; Tapan Samaddar; Hao Nguyen; Man Mui; Khin Htoo; Teruhiko Kamei; Masaaki Higashitani; et al. (IEEE J. Solid State Circuits, 2009)

128Gb 3b/cell NAND flash memory in 19nm technology with 18MB/s write rate and 400Mb/s toggle mode. - Yan Li; Seungpil Lee; Ken Oowada; Hao Nguyen; Qui Nguyen; Nima Mokhlesi; Cynthia Hsu; Jason Li 001; Venky Ramachandra; Teruhiko Kamei; Masaaki Higashitani; Tuan Pham; et al. (ISSCC, 2012)

A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology. - Hiroshi Maejima; Kazushige Kanda; Susumu Fujimura; Teruo Takagiwa; Susumu Ozawa; Jumpei Sato; Yoshihiko Shindo; Manabu Sato; Naoaki Kanagawa; Junji Musha; Satoshi Inoue; Katsuaki Sakurai; et al. (ISSCC, 2018)

A 512Gb 3-bit/Cell 3D Flash Memory on 128-Wordline-Layer with 132MB/s Write Performance Featuring Circuit-Under-Array Technology. - Chang Hua Siau; Kwang-Ho Kim; Seungpil Lee; Katsuaki Isobe; Noboru Shibata; Kapil Verma; Takuya Ariki; Jason Li 001; Jong Yuh; Anirudh Amarnath; Qui Nguyen; Ohwon Kwon; et al. (ISSCC, 2019)

A 176-Stacked 512Gb 3b/Cell 3D-NAND Flash with 10.8Gb/mm2 Density with a Peripheral Circuit Under Cell Array Architecture. - Jae-Woo Park; Doogon Kim; Sunghwa Ok; Jaebeom Park; Taeheui Kwon; Hyunsoo Lee; Sungmook Lim; Sunyoung Jung; Hyeong-Jin Choi; Taikyu Kang; Gwan Park; Chul-Woo Yang; et al. (ISSCC, 2021)

A 1-Tb, 4b/Cell, 176-Stacked-WL 3D-NAND Flash Memory with Improved Read Latency and a 14.8Gb/mm2 Density. - Wanik Cho; Jongseok Jung; Jongwoo Kim; Junghoon Nam; Sangkyu Lee; Yujong Noh; Dauni Kim; Wanseob Lee; Kayoung Cho; Kwanho Kim; Heejoo Lee; Sooyeol Chai; et al. (ISSCC, 2022)

A High-Performance 1Tb 3b/Cell 3D-NAND Flash with a 194MB/s Write Throughput on over 300 Layers $ mathsf{i}$. - Bvunarvul Kim; Seungpil Lee; Beomseok Hah; Kanawoo Park; Yongsoon Park; Kangwook Jo; Yujong Noh; Hyeon-Cheon Seol; Hyunsoo Lee; Jae-Hyeon Shin; Seongjin Choi; Youngdon Jung; et al. (ISSCC, 2023)

ARCLE: The Abstraction and Reasoning Corpus Learning Environment for Reinforcement Learning. - Hosung Lee; Sejin Kim 002; Seungpil Lee; Sanha Hwang; Jihwan Lee; Byung-Jun Lee; Sundong Kim (CoLLAs, 2024)

From Generation to Selection: Findings of Converting Analogical Problem-Solving into Multiple-Choice Questions. - Donghyeon Shin; Seungpil Lee; Klea Kovacec; Sundong Kim (EMNLP (Findings), 2024)

Reasoning Abilities of Large Language Models: In-Depth Analysis on the Abstraction and Reasoning Corpus. - Seungpil Lee; Woochang Sim; Donghyeon Shin; Sanha Hwang; Wongyu Seo; Jiwon Park; Seokki Lee; Sejin Kim 002; Sundong Kim (CoRR, 2024)

A 321-Layer 2Tb 4b/cell 3D-NAND-Flash Memory with a 75MB/s Program Throughput. - Wanik Cho; Chanhui Jeong; Jongwoo Kim; Jongseok Jung; Keunseon Ahn; Jayoon Goo; Sangkyu Lee; Kayoung Cho; Tei Cho; Dauni Kim; Gwan Park; Yushin Ahn; et al. (ISSCC, 2025)