Modular vector processor architecture targeting at data-level parallelism. - Seyed A. Rooholamin; Sotirios G. Ziavras (Microprocess. Microsystems, 2015)

Power-Performance Optimization of a Virtualized SMT Vector Processor via Thread Fusion and Lane Configuration. - Yaojie Lu 002; Seyed Amin Rooholamin; Sotirios G. Ziavras (ISVLSI, 2016)

Vector Coprocessor Virtualization for Simultaneous Multithreading. - Yaojie Lu 002; Seyed A. Rooholamin; Sotirios G. Ziavras (ACM Trans. Embed. Comput. Syst., 2016)