A VLSI High-Performance Priority Encoder Using Standard CMOS Library. - Saleh Abdel-Hafeez; Shadi M. Harb (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Low-Power Content Addressable Memory With Read/Write and Matched Mask Ports. - Saleh Abdel-Hafeez; Shadi M. Harb; William R. Eisenstadt (PATMOS, 2007)

A low-power CAM using a 12-transistor design cell. - Saleh Abdel-Hafeez; Shadi M. Harb; William R. Eisenstadt (VLSI-SoC, 2007)

High speed digital CMOS divide-by-N fequency divider. - Saleh Abdel-Hafeez; Shadi M. Harb; William R. Eisenstadt (ISCAS, 2008)

Analytical Study of the Expected Number of Hops in Wireless Ad Hoc Network. - Shadi M. Harb; Janise McNair (WASA, 2008)

High speed I/O and thermal effect characterization of 3D stacked ICs. - Moishe Groger; Shadi M. Harb; Devin Morris; William R. Eisenstadt; Sudeep Puligundla (3DIC, 2009)

A sub-1V CMOS voltage reference generator. - Shadi M. Harb; William R. Eisenstadt; Robert M. Fox (ISCAS, 2011)

A Shadow Dynamic Finite State Machine for Branch Prediction: An Alternative for the 2-bit Saturating Counter. - Saleh Abdel-Hafeez; Ann Gordon-Ross; Asem Albosul; Ahmad Shatnawi; Shadi M. Harb (Informatica (Slovenia), 2011)

A CMOS High Resolution Multi-Edge Delay Generator. - Shadi M. Harb; William R. Eisenstadt (NORCAS, 2015)

Development, Implementation, Assessment of a Web-based Circuit Solver for Teaching Basic Electrical Circuits Theory. - Shadi M. Harb; Issa Batarseh; Ahmad Harb (Int. J. Online Eng., 2015)

Oscillation ring testing methodology of TSVs in 3D stacked ICs. - Shadi M. Harb; William R. Eisenstadt (NORCAS, 2016)

A study of characterizing crosstalk effects in 3-D vias. - Shadi M. Harb; William R. Eisenstadt (LASCAS, 2017)

Signal Integrity in High Speed 3D IC Design- A Case Study. - Shadi M. Harb; William R. Eisenstadt (NorCAS, 2021)

A novel self-timing CMOS first-edge take-all circuit for on-chip communication systems. - Saleh Abdel-Hafeez; Shadi M. Harb (IET Comput. Digit. Tech., 2023)