Hardware Pessimistic Run-Time Profiling for a Self-Reconfigurable Embedded Processor Architecture. - Shady O. Agwa; Hany H. Ahmad; Awad I. Saleh (ReConFig, 2010)

Variability mitigation using correction function technique. - Shady O. Agwa; Eslam Yahya; Yehea I. Ismail (ICECS, 2013)

ERSUT: A Self-Healing Architecture for Mitigating PVT Variations Without Pipeline Flushing. - Shady O. Agwa; Eslam Yahya; Yehea Ismail (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

Power efficient AES core for IoT constrained devices implemented in 130nm CMOS. - Shady O. Agwa; Eslam Yahya; Yehea Ismail (ISCAS, 2017)

A Low Power Self-healing Resilient Microarchitecture for PVT Variability Mitigation. - Shady O. Agwa; Eslam Yahya; Yehea Ismail (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

PyOCN: A Unified Framework for Modeling, Testing, and Evaluating On-Chip Networks. - Cheng Tan 002; Yanghui Ou; Shunning Jiang; Peitian Pan; Christopher Torng; Shady Agwa; Christopher Batten (ICCD, 2019)

Towards a Reconfigurable Bit-Serial/Bit-Parallel Vector Accelerator using In-Situ Processing-In-SRAM. - Khalid Al-Hawaj; Olalekan Afuye; Shady Agwa; Alyssa B. Apsel; Christopher Batten (ISCAS, 2020)

Implementing Low-Diameter On-Chip Networks for Manycore Processors Using a Tiled Physical Design Methodology. - Yanghui Ou; Shady Agwa; Christopher Batten (NOCS, 2020)

Layout-Based Evaluation of Read/Write Performance of SOT-MRAM and SOTFET-RAM. - Olalekan Afuye; Shady Agwa; Christopher Batten; Alyssa B. Apsel (ESSDERC, 2021)

High-Density Digital RRAM-based Memory with Bit-line Compute Capability. - Shady Agwa; Yihan Pan; Thomas Abbey; Alexander Serb; Themis Prodromakis (ISCAS, 2022)

A CMOS-based Characterisation Platform for Emerging RRAM Technologies. - Andrea Mifsud; Jiawei Shen; Peilong Feng; Lijie Xie; Chaohan Wang; Yihan Pan; Sachin Maheshwari; Shady Agwa; Spyros Stathopoulos; Shiwei Wang 001; Alexander Serb; Christos Papavassiliou; et al. (ISCAS, 2022)

CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA. - Ting-Jung Chang; Ang Li 011; Fei Gao 016; Tuan Ta; Georgios Tziantzioulis; Yanghui Ou; Moyang Wang; Jinzheng Tu 001; Kaifeng Xu; Paul J. Jackson; August Ning; Grigory Chirkov; et al. (CICC, 2023)

EVE: Ephemeral Vector Engines. - Khalid Al-Hawaj; Tuan Ta; Nick Cebry; Shady Agwa; Olalekan Afuye; Eric Hall; Courtney Golden; Alyssa B. Apsel; Christopher Batten (HPCA, 2023)

A 1T1R+2T Analog Content-Addressable Memory Pixel for Online Template Matching. - Shady Agwa; Georgios Papandroulidakis; Themis Prodromakis (ISCAS, 2023)

Bent-Pyramid: Towards A Quasi-Stochastic Data Representation for AI Hardware. - Shady Agwa; Themis Prodromakis (NEWCAS, 2023)

PyT-NeuroPack: A Hybrid PyTorch/Memristor-Crossbar Simulation Tool for Convolutional Neural Networks. - Cristian Sestito; Weijie Huang; Shady Agwa; Themis Prodromakis (NewCAS, 2024)

An Energy-efficient Capacitive-Memristive Content Addressable Memory. - Yihan Pan; Adrian Wheeldon; Mohammed Mughal; Shady Agwa; Themis Prodromakis; Alexantrou Serb (CoRR, 2024)

TrIM: Triangular Input Movement Systolic Array for Convolutional Neural Networks - Part I: Dataflow and Analytical Modelling. - Cristian Sestito; Shady Agwa; Themis Prodromakis (CoRR, 2024)

TrIM: Triangular Input Movement Systolic Array for Convolutional Neural Networks - Part II: Architecture and Hardware Implementation. - Cristian Sestito; Shady Agwa; Themis Prodromakis (CoRR, 2024)

A 9T4R RRAM-Based ACAM for Analogue Template Matching at the Edge. - Georgios Papandroulidakis; Shady Agwa; Ahmet Cirakoglu; Themis Prodromakis (CoRR, 2024)

DiP: A Scalable, Energy-Efficient Systolic Array for Matrix Multiplication Acceleration. - Ahmed J. Abdelmaksoud; Shady Agwa; Themis Prodromakis (CoRR, 2024)

An Energy-Efficient Capacitive-RRAM Content Addressable Memory. - Yihan Pan; Adrian Wheeldon; Mohammed Mughal; Shady Agwa; Themis Prodromakis; Alexantrou Serb (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

RRAM-Based Analogue Artificial Neuron for Gaussian Activation Function Edge Classifier. - Georgios Papandroulidakis; Shady Agwa; Themis Prodromakis (ISCAS, 2025)

Live Demonstration: Hardware/Software Co-Design to Exploit RRAM Programmability for Emerging Edge Classification Using ArC TWO. - Cristian Sestito; Georgios Papandroulidakis; Patrick Foster; Spyros Stathopoulos; Shady Agwa; Themis Prodromakis (ISCAS, 2025)

L-Sort: On-Chip Spike Sorting With Efficient Median-of-Median Detection and Localization-Based Clustering. - Yuntao Han; Yihan Pan; Xiongfei Jiang; Cristian Sestito; Shady Agwa; Themis Prodromakis; Shiwei Wang 001 (IEEE Open J. Circuits Syst., 2025)

A Hybrid Edge Classifier: Combining TinyML-Optimised CNN with RRAM-CMOS ACAM for Energy-Efficient Inference. - Kieran Woodward; Eiman Kanjo; Georgios Papandroulidakis; Shady Agwa; Themis Prodromakis (CoRR, 2025)

3D-TrIM: A Memory-Efficient Spatial Computing Architecture for Convolution Workloads. - Cristian Sestito; Ahmed J. Abdelmaksoud; Shady Agwa; Themis Prodromakis (CoRR, 2025)

TrIM, Triangular Input Movement Systolic Array for Convolutional Neural Networks: Architecture and Hardware Implementation. - Cristian Sestito; Shady Agwa; Themis Prodromakis (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)

OISMA: On-the-fly In-memory Stochastic Multiplication Architecture for Matrix-Multiplication Workloads. - Shady Agwa; Yihan Pan; Georgios Papandroulidakis; Themis Prodromakis (CoRR, 2025)