A New High Performance Active Building Block Suitable for Low Voltage Low Power Signal Processing. - Atul Kumar; Bhartendu Chaturvedi; Shafali Jagga (IC3, 2022)

New CMOS Compatible Realizations of Grounded/Floating L, C Multiplier and FDNC Simulators. - Atul Kumar; Bhartendu Chaturvedi; Shafali Jagga (Circuits Syst. Signal Process., 2023)

High-Performance MOS-C Realization of Mixed-Mode Third-Order Sinusoidal Oscillator. - Atul Kumar; Bhartendu Chaturvedi; Shafali Jagga (J. Circuits Syst. Comput., 2024)