Low power high bandwidth amplifier with RC Miller and gain enhanced feedforward compensation. - Shagun Bajoria; Vineet Kumar Singh; Raju Kunde; Chetan D. Parikh (ISLPED, 2008)

A 36V voltage-to-current converter with dynamic element matching and auto-calibration for AC ripple reduction. - Shagun Bajoria; Martijn F. Snoeij; Viola Schaffer; Mikhail V. Ivanov; Sijia Wang; Kofi A. A. Makinwa (ESSCIRC, 2011)

15.2 A 2.2GHz continuous-time ΔΣ ADC with -102dBc THD and 25MHz BW. - Lucien J. Breems; Muhammed Bolatkale; Hans Brekelmans; Shagun Bajoria; Jan Niehof; Robert Rutten; Bert Oude-Essink; Franco Fritschij; Jagdip Singh; Gerard Lassche (ISSCC, 2016)

A 2.2 GHz Continuous-Time ΔΣ ADC With -102 dBc THD and 25 MHz Bandwidth. - Lucien J. Breems; Muhammed Bolatkale; Hans Brekelmans; Shagun Bajoria; Jan Niehof; Robert Rutten; Bert Oude-Essink; Franco Fritschij; Jagdip Singh; Gerard Lassche (IEEE J. Solid State Circuits, 2016)

Novel Baseband Analog Beamforming through Resistive DACs and Sigma Delta Modulators. - Stijn Ringeling; Loek Steinebach; Qilong Liu; Chenming Zhang; Shagun Bajoria; Muhammed Bolatkale; Lucien J. Breems; Georgi I. Radulov (ECCTD, 2020)

Analysis of the Inter-Stage Signal Leakage in Wide BW Low OSR and High DR CT MASH ΔΣM. - Qilong Liu; Lucien J. Breems; Shagun Bajoria; Muhammed Bolatkale; Chenming Zhang; Georgi I. Radulov (ISCAS, 2020)

A 6GS/s 0.5GHz BW continuous-time 2-1-1 MASH ΔΣ modulator with phase-boosted current-mode ELD compensation in 40nm CMOS. - Chenming Zhang; Lucien J. Breems; Qilong Liu; Georgi I. Radulov; Muhammed Bolatkale; Shagun Bajoria; Robert Rutten; Arthur H. M. van Roermund (ESSCIRC, 2021)

A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW. - Pierluigi Cenci; Hans Brekelmans; Shagun Bajoria; Marcello Ganzerli; Bernard Burdiek; Robert Rutten; Yihan Gao; Muhammed Bolatkale; Paul Swinkels; Lucien J. Breems (ESSCIRC, 2022)

A 28nm 6GHz 2b Continuous-Time ΔΣ ADC with -101 dBc THD and 120MHz Bandwidth Using Digital DAC Error Correction. - Muhammed Bolatkale; Robert Rutten; Hans Brekelmans; Shagun Bajoria; Yihan Gao; Bernard Burdiek; Lucien J. Breems (ISSCC, 2022)

A 5GS/s 360MHz-BW 68dB-DR Continuous-Time 1-1-1 Filtering MASH ΔΣ ADC in 40nm CMOS. - Qilong Liu; Lucien J. Breems; Chenming Zhang; Shagun Bajoria; Muhammed Bolatkale; Robert Rutten; Georgi I. Radulov (ISSCC, 2022)

A 28-nm 6-GHz 2-bit Continuous-Time ΔΣ ADC With -101-dBc THD and 120-MHz Bandwidth Using Blind Digital DAC Error Correction. - Muhammed Bolatkale; Robert Rutten; Hans Brekelmans; Shagun Bajoria; Yihan Gao; Bernard Burdiek; Lucien J. Breems (IEEE J. Solid State Circuits, 2022)

A 158-mW 360-MHz BW 68-dB DR Continuous-Time 1-1-1 Filtering MASH ADC in 40-nm CMOS. - Qilong Liu; Lucien J. Breems; Shagun Bajoria; Muhammed Bolatkale; Robert Rutten; Georgi I. Radulov (IEEE J. Solid State Circuits, 2022)

A 6GHz Multi-Path Multi-Frequency Chopping CTΔΣ Modulator achieving 122dBFS SFDR from 150kHz to 120MHz BW. - Sundeep Javvaji; Muhammed Bolatkale; Shagun Bajoria; Robert Rutten; Bert Oude-Essink; Koen Beijens; Kofi A. A. Makinwa; Lucien J. Breems (VLSI Technology and Circuits, 2023)

A 120-MHz BW, 122-dBFS SFDR CTΔΣ ADC With a Multi-Path Multi-Frequency Chopping Scheme. - Sundeep Javvaji; Muhammed Bolatkale; Shagun Bajoria; Robert Rutten; Bert Oude-Essink; Koen Beijens; Kofi A. A. Makinwa; Lucien J. Breems (IEEE J. Solid State Circuits, 2024)

Quantization Noise Cancellation Through Modelling of Non-Linearities in Sigma Delta Modulators. - Stijn Ringeling; Marco Fattori; Shagun Bajoria; Robert Rutten; Lucien J. Breems; Eugenio Cantatore (ISCAS, 2025)

A 6-GHz Continuous-Time Bandpass ΔΣ ADC With Background Filter Calibration and -100 dBc IM3 for a Mixer-Less DAB Band III Receiver. - Shagun Bajoria; Robert Rutten; Muhammed Bolatkale; Yihan Gao; Hans Brekelmans; Bernard Burdiek; Hendrik van der Ploeg; Lucien J. Breems (IEEE J. Solid State Circuits, 2025)