Delay-Reduced Combinational Logic Synthesis using Multiplexers. - Rekha K. James; Shahana Thottathikkulam Kassim; K. Poulose Jacob; Sreela Sasi (ESA, 2006)

Genetic Algorithm-Based Combinational Logic Synthesis Using Universal Logic Modules. - Shahana Thottathikkulam Kassim; Rekha K. James; K. Poulose Jacob; Sreela Sasi (ESA, 2007)

A New Look at Reversible Logic Implementation of Decimal Adder. - Rekha K. James; Shahana Thottathikkulam Kassim; K. Poulose Jacob; Sreela Sasi (SoC, 2007)

RRNS-Convolutional encoded concatenated code for OFDM based wireless communication. - Shahana Thottathikkulam Kassim; Babita R. Jose; Rekha K. James; K. Poulose Jacob; Sreela Sasi (ICON, 2008)

Dual-mode RNS based programmable decimation filter for WCDMA and WLANa. - Shahana Thottathikkulam Kassim; Babita R. Jose; Rekha K. James; K. Poulose Jacob; Sreela Sasi (ISCAS, 2008)

Fixed Point Decimal Multiplication Using RPS Algorithm. - Rekha K. James; Shahana Thottathikkulam Kassim; K. Poulose Jacob; Sreela Sasi (ISPA, 2008)

RNS Based Programmable Multi-Mode Decimation Filter for WCDMA and WiMAX. - Shahana Thottathikkulam Kassim; Babita R. Jose; Rekha K. James; K. Poulose Jacob; Sreela Sasi (VTC Spring, 2008)

Delay and Area Efficient Sound Wave Decomposition by Nonuniform Filter Bank for Digital Hearing Aids. - V. V. Mahesh; T. K. Shahana 001 (IntelliSys (1), 2016)

A multi-mode MASH ΣΑ modulator for low power wideband applications. - Rijo Sebastian; Jos A. V. Prakash; Babita Roslind Jose; Shahana Thottathikkulam Kassim (ISED, 2016)

Multi-Stage Noise Shaping ΔΣ Modulator with Enhanced Noise Shaping for Low Power Wideband Applications. - Rijo Sebastian; Jos A. V. Prakash; Babita Roslind Jose; Shahana Thottathikkulam Kassim (J. Low Power Electron., 2017)

Isolated Switched Boost DC-DC Converter with Coupled Inductor and Transformer. - Preenu Paul; Babita R. Jose; Shahana Thottathikkulam Kassim; Chikku Abraham; Jimson Mathew (TENCON, 2019)

High throughput FIR filter architectures using retiming and modified CSLA based adders. - Pramod Patali; Shahana Thottathikkulam Kassim (IET Circuits Devices Syst., 2019)

Efficient modular hybrid adders and Radix-4 booth multipliers for DSP applications. - Pramod Patali; Shahana Thottathikkulam Kassim (Microelectron. J., 2020)

New Biclique Cryptanalysis on Full-Round PRESENT-80 Block Cipher. - K. B. Jithendra; Shahana Thottathikkulam Kassim (SN Comput. Sci., 2020)

New results in biclique cryptanalysis of full round GIFT. - K. B. Jithendra; Shahana Thottathikkulam Kassim (J. Intell. Fuzzy Syst., 2021)

High throughput and energy efficient linear phase FIR filter architectures. - Pramod Patali; Shahana Thottathikkulam Kassim (Microprocess. Microsystems, 2021)

PAPR reduction using constrained convex optimization for vector OFDM. - Basil K. Jeemon; T. K. Shahana 001 (Ann. des Télécommunications, 2023)

Exact and approximate multiplications for signal processing applications. - Pramod Patali; Shahana Thottathikkulam Kassim (Microelectron. J., 2023)

Non-Contiguous Orthogonal Time Frequency Space Modulation for Cognitive Radio to Enhance Spectrum Sharing in High Doppler Channels. - Basil K. Jeemon; T. K. Shahana 001 (Wirel. Pers. Commun., 2025)