High speed FIR filter implementation using add and shift method. - Shahnam Mirzaei; Anup Hosangadi; Ryan Kastner (FPGA, 2006)

Carrier Offset and Channel Estimation for Cooperative MIMO Sensor Networks. - Ronald A. Iltis; Shahnam Mirzaei; Ryan Kastner; Richard E. Cagley; Brad T. Weals (GLOBECOM, 2006)

FPGA Implementation of High Speed FIR Filters Using Add and Shift Method. - Shahnam Mirzaei; Anup Hosangadi; Ryan Kastner (ICCD, 2006)

Implementation of the Alamouti OSTBC to a Distributed Set of Single-Antenna Wireless Nodes. - Richard E. Cagley; Brad T. Weals; Scott A. McNally; Ronald A. Iltis; Shahnam Mirzaei; Ryan Kastner (WCNC, 2007)

Design space exploration of a cooperative MIMO receiver for reconfigurable architectures. - Shahnam Mirzaei; Ali Irturk; Ryan Kastner; Brad T. Weals; Richard E. Cagley (ASAP, 2008)

An FPGA Design Space Exploration Tool for Matrix Inversion Architectures. - Ali Irturk; Bridget Benson; Shahnam Mirzaei; Ryan Kastner (SASP, 2008)

Parallelized Architecture of Multiple Classifiers for Face Detection. - Junguk Cho; Bridget Benson; Shahnam Mirzaei; Ryan Kastner (ASAP, 2009)

Fpga-based face detection system using Haar classifiers. - Junguk Cho; Shahnam Mirzaei; Jason Oberg; Ryan Kastner (FPGA, 2009)

Field Programmable Gate Array Implementation of Parts-Based Object Detection for Real Time Video Applications. - Deborah Goshorn; Junguk Cho; Ryan Kastner; Shahnam Mirzaei (FPL, 2010)

Layout Aware Optimization of High Speed Fixed Coefficient FIR Filters for FPGAs. - Shahnam Mirzaei; Ryan Kastner; Anup Hosangadi (Int. J. Reconfigurable Comput., 2010)

GUSTO: An automatic generation and optimization tool for matrix inversion architectures. - Ali Irturk; Bridget Benson; Shahnam Mirzaei; Ryan Kastner (ACM Trans. Embed. Comput. Syst., 2010)

Reconfigurable IP-Based Spectral Interference Canceller. - Peter Littlewood; Shahnam Mirzaei; Krishna Murthy Kattiyan Ramamoorthy (ARC, 2018)

High Level Synthesis Implementation of Object Tracking Algorithm on Reconfigurable Hardware. - Uzaif Sharif; Shahnam Mirzaei (ARC, 2018)

A Novel Approach for Efficient Implementation of Nucleus Detection and Segmentation Using Correlated Dual Color Space. - Yin Fung Khong; Shahnam Mirzaei (SMC, 2019)

A Novel Method for Hardware Acceleration of Convex Hull Algorithm on Reconfigurable Hardware. - Kris Min; Brenda Ly; Joshua Garner; Shahnam Mirzaei (SoCC, 2020)

An FPGA Based Hardware Accelerated Framework for Solar Spectra Matching with Parameterized Matched Filter IP Core. - Verjina Torosian Khouygani; Shahnam Mirzaei; Christian Beck; Debi Prasad Choudhary (FCCM, 2021)

System on Chip (SoC) Security Architecture Framework for Isolated Domains Against Threats. - Siam Haque; Shahnam Mirzaei (HOST, 2022)

Accelerating Solar Spectra Analysis:A High-Performance FPGA Framework with Parameterized Filters. - Verjina Torosian Khouygani; Shahnam Mirzaei; Christian Beck; Debi Prasad Choudhary (ISVLSI, 2025)

An Optimized FPGA Based Canny Edge Detection System Using High-Level Synthesis. - Shahbaz Hassan Khan Malik; Shahnam Mirzaei (SysCon, 2025)