A 9b 14µW 0.06mm2 PPM ADC in 90nm digital CMOS. - Shahrzad Naraghi; Matthew Courcy; Michael P. Flynn (ISSCC, 2009)

A 9-bit, 14 μW and 0.06 mm 2 Pulse Position Modulation ADC in 90 nm Digital CMOS. - Shahrzad Naraghi; Matthew Courcy; Michael P. Flynn (IEEE J. Solid State Circuits, 2010)

Rand PPM: A lowpower compressive sampling analog to digital converter. - Praveen K. Yenduri; Anna C. Gilbert; Michael P. Flynn; Shahrzad Naraghi (ICASSP, 2011)

A Low-Power Compressive Sampling Time-Based Analog-to-Digital Converter. - Praveen K. Yenduri; Aaron Z. Rocca; Aswin S. Rao; Shahrzad Naraghi; Michael P. Flynn; Anna C. Gilbert (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Session 2 - Low power analog. - Shahrzad Naraghi; Alessandro Piovaccari (CICC, 2015)

A 1-to-112Gb/s DSP-Based Wireline Transceiver with a Flexible Clocking Scheme in 5nm FinFET. - Aida Varzaghani; Bardia Bozorgzadeh; Jack Lam; Ankush Goel; Xiaobin Yuan; Mohamed Elzeftawi; Mehran Izad; Sudipta Sarkar; Alberto Baldisserotto; Seong-Ryong Ryu; Steven Mikes; Jeffrey Hwang; et al. (VLSI Technology and Circuits, 2022)