Model-based rapid prototyping of multirate digital signal processing algorithms. - Shahzad Ahmad Butt; Luciano Lavagno (NORCHIP, 2011)

Designing parameterized signal processing ips for high level synthesis in a model based design environment. - Shahzad Ahmad Butt; Luciano Lavagno (CODES+ISSS, 2012)

Design space exploration and synthesis for digital signal processing algorithms from Simulink models. - Shahzad Ahmad Butt; Luciano Lavagno (IDT, 2013)

Design of a pseudo-log image transform IP in an HLS-based memory management framework. - Shahzad Ahmad Butt; Stéphane Mancini; Frédéric Rousseau 001; Luciano Lavagno (Real-Time Image and Video Processing, 2013)

Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework. - Shahzad Ahmad Butt; Stéphane Mancini; Frédéric Rousseau 001; Luciano Lavagno (J. Electronic Imaging, 2014)

Model-based High Level Synthesis and Design Space Exploration. - Shahzad Ahmad Butt (2015)

Designing Parameterizable Hardware IPs in a Model-Based Design Environment for High-Level Synthesis. - Shahzad Ahmad Butt; Mehdi Roozmeh; Luciano Lavagno (ACM Trans. Embed. Comput. Syst., 2016)

Design and hardware implementation of the code and carrier tracking block for an inter-operable GNSS receiver. - Rabbia Idrees; Shahzad Ahmad Butt (SysCon, 2018)

if-ZKP: Intel FPGA-Based Acceleration of Zero Knowledge Proofs. - Shahzad Ahmad Butt; Benjamin Reynolds; Veeraraghavan Ramamurthy; Xiao Xiao; Pohrong Chu; Setareh Sharifian; Sergey Gribok; Bogdan Pasca 001 (FCCM, 2024)