Design of Ternary Logic Circuits Using GNRFET and RRAM. - Shaik Javid Basha; P. Venkatramana (Circuits Syst. Signal Process., 2023)

An Effective Method to Develop Pseudo Ntype-GNRFETs based Digital Circuits in Ternary Logic. - P. Raghu Ramaiah; Shaik Javid Basha; K. Vinod Kumar; Y. Mallikarjuna Rao (ICCCNT, 2024)

High Performance and PVT Variation Tolerant Design for a Ternary Multiplier Using GNRFET Technology. - Shaik Javid Basha; Ahmed Elbarbary; Haitham A. Mahmoud; P. Venkatramana (Circuits Syst. Signal Process., 2025)