Incremental Polymorphism. - Shail Aditya; Rishiyur S. Nikhil (FPCA, 1991)

Compiler-directed Type Reconstruction for Polymorphic Languages. - Shail Aditya; Alejandro Caro (FPCA, 1993)

Garbage Collection for Strongly-Typed Languages Using Run-Time Type Reconstruction. - Shail Aditya; Christine H. Flood; James E. Hicks (LISP and Functional Programming, 1994)

Semantics of Barriers in a Non-Strict, Implicitly-Parallel Language. - Shail Aditya; Arvind 001; Joseph E. Stoy (FPCA, 1995)

A Multithreaded Substrate and Compilation Model for the Implicity Parallel Language pH. - Arvind 001; Alejandro Caro; Jan-Willem Maessen; Shail Aditya (LCPC, 1996)

Automatic Architectural Synthesis of VLIW and EPIC Processors. - Shail Aditya; B. Ramakrishna Rau; Vinod Kathail (ISSS, 1999)

Machine-Description Driven Compilers for EPIC and VLIW Processors. - B. Ramakrishna Rau; Vinod Kathail; Shail Aditya (Des. Autom. Embed. Syst., 1999)

High-Level Synthesis of Nonprogrammable Hardware Accelerators. - Robert Schreiber; Shail Aditya; B. Ramakrishna Rau; Vinod Kathail; Scott A. Mahlke; Santosh G. Abraham; Greg Snider (ASAP, 2000)

Code size minimization and retargetable assembly for custom EPIC and VLIW instruction formats. - Shail Aditya; Scott A. Mahlke; B. Ramakrishna Rau (ACM Trans. Design Autom. Electr. Syst., 2000)

ShiftQ: a bufferred interconnect for custom loop accelerators. - Shail Aditya; Michael S. Schlansker (CASES, 2001)

Cycle-time aware architecture synthesis of custom hardware accelerators. - Mukund Sivaraman; Shail Aditya (CASES, 2002)

PICO: Automatically Designing Custom Computers. - Vinod Kathail; Shail Aditya; Robert Schreiber; B. Ramakrishna Rau; Darren C. Cronquist; Mukund Sivaraman (Computer, 2002)

PICO-NPA: High-Level Synthesis of Nonprogrammable Hardware Accelerators. - Robert Schreiber; Shail Aditya; Scott A. Mahlke; Vinod Kathail; B. Ramakrishna Rau; Darren C. Cronquist; Mukund Sivaraman (J. VLSI Signal Process., 2002)

Tutorial T8A: Automated Application Engine Synthesis from C Algorithms. - Vinod Kathail; Shail Aditya; Craig Gleason; Nagesh Chatekar (VLSI Design, 2007)

Looking Back 25 Years to the HP Labs ASIC Synthesis Project, PICO. - Robert Schreiber; Shail Aditya; Vinod Kathail (ASAP, 2025)