Termination proofs for linear simple loops. - Hong Yi Chen; Shaked Flur; Supratik Mukhopadhyay (Int. J. Softw. Tools Technol. Transf., 2015)

Modelling the ARMv8 architecture, operationally: concurrency and ISA. - Shaked Flur; Kathryn E. Gray; Christopher Pulte; Susmit Sarkar; Ali Sezgin; Luc Maranget; Will Deacon; Peter Sewell (POPL, 2016)

Mixed-size concurrency: ARM, POWER, C/C++11, and SC. - Shaked Flur; Susmit Sarkar; Christopher Pulte; Kyndylan Nienhuis; Luc Maranget; Kathryn E. Gray; Ali Sezgin; Mark Batty; Peter Sewell (POPL, 2017)

Simplifying ARM concurrency: multicopy-atomic axiomatic and operational models for ARMv8. - Christopher Pulte; Shaked Flur; Will Deacon; Jon French; Susmit Sarkar; Peter Sewell (Proc. ACM Program. Lang., 2018)

ISA semantics for ARMv8-a, RISC-v, and CHERI-MIPS. - Alasdair Armstrong; Thomas Bauereiss; Brian Campbell 001; Alastair Reid 001; Kathryn E. Gray; Robert M. Norton; Prashanth Mundkur; Mark Wassell; Jon French; Christopher Pulte; Shaked Flur; Ian Stark; et al. (Proc. ACM Program. Lang., 2019)

ARMv8-A System Semantics: Instruction Fetch in Relaxed Architectures. - Ben Simner; Shaked Flur; Christopher Pulte; Alasdair Armstrong; Jean Pichon-Pharabod; Luc Maranget; Peter Sewell (ESOP, 2020)

Repairing and mechanising the JavaScript relaxed memory model. - Conrad Watt; Christopher Pulte; Anton Podkopaev; Guillaume Barbier; Stephen Dolan; Shaked Flur; Jean Pichon-Pharabod; Shu-yu Guo (PLDI, 2020)

Towards making formal methods normal: meeting developers where they are. - Alastair Reid 001; Luke Church; Shaked Flur; Sarah de Haas; Maritza Johnson; Ben Laurie (CoRR, 2020)