TEAChER: TEach AdvanCEd Reconfigurable Architectures and Tools. - Kostas Siozios; Peter Figuli; Harry Sidiropoulos; Carsten Tradowsky; Dionysios Diamantopoulos; Konstantinos Maragos 001; Shalina Percy Delicia; Dimitrios Soudris; Jürgen Becker 001 (ARC, 2015)

Parametric design space exploration for optimizing QAM based high-speed communication. - Shalina Percy Delicia; George Ford; Peter Figuli; Jürgen Becker 001 (ICCC, 2015)

A power estimation technique for cycle-accurate higher-abstraction SystemC-based CPU models. - Efstathios Sotiriou-Xanthopoulos; Shalina Percy Delicia; Peter Figuli; Kostas Siozios; George Economakos; Jürgen Becker 001 (SAMOS, 2015)

A variable FPGA based generic QAM transmitter with scalable mixed time and frequency domain signal processing. - Shalina Percy Delicia Figuli; Alberto Sonnino; Peter Figuli; Jürgen Becker 001 (TSP, 2016)

Parameter Sensitivity in Virtual FPGA Architectures. - Peter Figuli; Weiqiao Ding; Shalina Percy Delicia Figuli; Kostas Siozios; Dimitrios Soudris; Jürgen Becker 001 (ARC, 2017)

A reconfigurable high-speed spiral FIR filter architecture. - Shalina Percy Delicia Figuli; Peter Figuli; Jürgen Becker 001 (TSP, 2017)

Reconfigurable FPGA-Based Channelization Using Polyphase Filter Banks for Quantum Computing Systems. - Johannes Pfau; Shalina Percy Delicia Figuli; Steffen Bähr; Jürgen Becker 001 (ARC, 2018)

An Efficient High-Throughput Generic QAM Transmitter with Scalable Spiral FIR Filter. - Shalina Percy Delicia Figuli; Jürgen Becker 001 (J. Circuits Syst. Comput., 2019)