Cooptimization of interface hardware and software for I/O controllers. - Kuan Jen Lin; Shih Hao Huang; Shan Chien Fang (DATE, 2006)

Overcoming glitches and dissipation timing skews in design of DPA-resistant cryptographic hardware. - Kuan Jen Lin; Shan Chien Fang; Shih Hsien Yang; Cheng Chia Lo (DATE, 2007)

Design Optimization and Automation for Secure Cryptographic Circuits. - Kuan Jen Lin; Yi Tang Chiu; Shan Chien Fang (VLSI Design, 2009)