6.8 mW 2.5 Gb/s and 42.5 mW 5 Gb/s 1: 8 CMOS demultiplexers. - Shanfeng Cheng; José Silva-Martínez (ISCAS (4), 2004)

Design and Analysis of an Ultrahigh-Speed Glitch-Free Fully Differential Charge Pump With Minimum Output Current Variation and Accurate Matching. - Shanfeng Cheng; Haitao Tong; José Silva-Martínez; Aydin I. Karsilayan (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

A Fully Differential Low-Power Divide-by-8 Injection-Locked Frequency Divider Up to 18 GHz. - Shanfeng Cheng; Haitao Tong; José Silva-Martínez; Aydin Ilker Karsilayan (IEEE J. Solid State Circuits, 2007)

Steady-State Analysis of Phase-Locked Loops Using Binary Phase Detector. - Shanfeng Cheng; Haitao Tong; José Silva-Martínez; Aydin I. Karsilayan (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

An Injection-Locked Frequency Divider With Multiple Highly Nonlinear Injection Stages and Large Division Ratios. - Haitao Tong; Shanfeng Cheng; Aydin I. Karsilayan; José Silva-Martínez (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

A fully integrated power-management solution for a 65nm CMOS cellular handset chip. - Arnold James D'Souza; Ravpreet Singh; J. Raja Prabhu; Gajendranath Chowdary; Ankit Seedher; Shyam Somayajula; Nageswara Rao Nalam; Lionel Cimaz; Stephane Le Coq; Praveen Kallam; Siddharth Sundar; Shanfeng Cheng; et al. (ISSCC, 2011)

An LC Quadrature VCO Using Capacitive Source Degeneration Coupling to Eliminate Bi-Modal Oscillation. - Haitao Tong; Shanfeng Cheng; Yung-Chung Lo; Aydin I. Karsilayan; José Silva-Martínez (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Multi-objective Optimization of Intelligent Wheelchair Paths Taking into Account User Preferences. - Shanfeng Cheng; Yong Li (ICIRA (1), 2022)