MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design. - Wenji Fang; Yao Lu; Shang Liu 006; Qijun Zhang; Ceyu Xu; Lisa Wu Wills; Hongce Zhang; Zhiyao Xie (ICCAD, 2023)

RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution. - Shang Liu 006; Wenji Fang; Yao Lu; Qijun Zhang; Hongce Zhang; Zhiyao Xie (CoRR, 2023)

RTLLM: An Open-Source Benchmark for Design RTL Generation with Large Language Model. - Yao Lu; Shang Liu 006; Qijun Zhang; Zhiyao Xie (ASPDAC, 2024)

Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization. - Wenji Fang; Shang Liu 006; Hongce Zhang; Zhiyao Xie (DAC, 2024)

OpenLLM-RTL: Open Dataset and Benchmark for LLM-Aided Design RTL Generation. - Shang Liu 006; Yao Lu; Wenji Fang; Mengming Li; Zhiyao Xie (ICCAD, 2024)

AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs. - Wenji Fang; Mengming Li; Min Li 019; Zhiyuan Yan 003; Shang Liu 006; Hongce Zhang; Zhiyao Xie (CoRR, 2024)

AssertLLM: Generating Hardware Verification Assertions from Design Specifications via Multi-LLMs. - Zhiyuan Yan 003; Wenji Fang; Mengming Li; Min Li 019; Shang Liu 006; Zhiyao Xie; Hongce Zhang (ASP-DAC, 2025)

A Self-Supervised, Pre-Trained, and Cross-Stage-Aligned Circuit Encoder Provides a Foundation for Various Design Tasks. - Wenji Fang; Shang Liu 006; Hongce Zhang; Zhiyao Xie (ASP-DAC, 2025)

Towards Big Data in AI for EDA Research: Generation of New Pseudo Circuits at RTL Stage. - Shang Liu 006; Wenji Fang; Yao Lu; Qijun Zhang; Zhiyao Xie (ASP-DAC, 2025)

Transferable Presynthesis PPA Estimation for RTL Designs With Data Augmentation Techniques. - Wenji Fang; Yao Lu; Shang Liu 006; Qijun Zhang; Ceyu Xu; Lisa Wu Wills; Hongce Zhang; Zhiyao Xie (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)

NetTAG: A Multimodal RTL-and-Layout-Aligned Netlist Foundation Model via Text-Attributed Graph. - Wenji Fang; Wenkai Li; Shang Liu 006; Yao Lu; Hongce Zhang; Zhiyao Xie (CoRR, 2025)

RTLCoder: Fully Open-Source and Efficient LLM-Assisted RTL Code Generation Technique. - Shang Liu 006; Wenji Fang; Yao Lu; Jing Wang 171; Qijun Zhang; Hongce Zhang; Zhiyao Xie (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)