An Efficient Hybrid Parallel Compression Approximate Multiplier. - Shangshang Yao; Liang Zhang; Qiong Wang 001; Li Shen 007 (ICCD, 2021)

Hardware-Efficient FPGA-Based Approximate Multipliers for Error-Tolerant Computing. - Shangshang Yao; Liang Zhang (FPT, 2022)

A High-performance SpMV Accelerator on HBM-equipped FPGAs. - Tao Li; Li Shen 007; Shangshang Yao (HPCC/DSS/SmartCity/DependSys, 2022)

FHAM: FPGA-based High-Efficiency Approximate Multipliers via LUT Encoding. - Shangshang Yao; Liang Zhang (ICCD, 2022)

ImprLM: An Improved Logarithmic Multiplier Design Approach via Iterative Linear-Compensation and Modified Dynamic Segment. - Shangshang Yao; Li Shen 007 (ICCD, 2023)

Biased Compressor Based Approximate Multiplier Design Using Genetic Algorithm. - Zhiqiang Wen; Yan Sun; Shangshang Yao; Weikang Xu; Jianmin Zhang (ISCAS, 2025)

Approx-T: Design Methodology for Approximate Multiplication Units via Taylor-Expansion. - Shangshang Yao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)