Relax-and-retime: a methodology for energy-efficient recovery based design. - Shankar Ganesh Ramasubramanian; Swagath Venkataramani; Adithya Parandhaman; Anand Raghunathan (DAC, 2013)

STAG: Spintronic-Tape Architecture for GPGPU cache hierarchies. - Rangharajan Venkatesan; Shankar Ganesh Ramasubramanian; Swagath Venkataramani; Kaushik Roy 001; Anand Raghunathan (ISCA, 2014)

SPINDLE: SPINtronic deep learning engine for large-scale neuromorphic computing. - Shankar Ganesh Ramasubramanian; Rangharajan Venkatesan; Mrigank Sharad; Kaushik Roy 001; Anand Raghunathan (ISLPED, 2014)

DyReCTape: a dynamically reconfigurable cache using domain wall memory tapes. - Ashish Ranjan 001; Shankar Ganesh Ramasubramanian; Rangharajan Venkatesan; Vijay S. Pai; Kaushik Roy 001; Anand Raghunathan (DATE, 2015)

Automatic Synthesis Techniques for Approximate Circuits. - Ashish Ranjan 001; Swagath Venkataramani; Shubham Jain; Younghoon Kim; Shankar Ganesh Ramasubramanian; Arnab Raha; Kaushik Roy 001; Anand Raghunathan (Approximate Circuits, 2019)

Minimal Aliasing Single-Error-Correction Codes for DRAM Reliability Improvement. - Sung-Il Pae; Vivek Joy Kozhikkottu; Dinesh Somasekar; Wei Wu; Shankar Ganesh Ramasubramanian; Melin Dadual; Hyungmin Cho; Kon-Woo Kwon (IEEE Access, 2021)