ROMA: A Reconfigurable On-chip Memory Architecture for Multi-core Accelerators. - Shantian Qin; Wenming Li; Zhihua Fan; Zhen Wang 045; Tianyu Liu; Haibin Wu; Kunming Zhang; Xuejun An; Xiaochun Ye; Dongrui Fan (HPCC/DSS/SmartCity/DependSys, 2023)

StreamDCIM: A Tile-based Streaming Digital CIM Accelerator with Mixed-stationary Cross-forwarding Dataflow for Multimodal Transformer. - Shantian Qin; Ziqing Qiang; Zhihua Fan; Wenming Li; Xuejun An; Xiaochun Ye; Dongrui Fan (ISCAS, 2025)

PANDA: Adaptive Prefetching and Decentralized Scheduling for Dataflow Architectures. - Shantian Qin; Zhihua Fan; Wenming Li; Zhen Wang 045; Xuejun An; Xiaochun Ye; Dongrui Fan (ACM Trans. Archit. Code Optim., 2025)