Leveraging PyTorch for Hardware-Aware Optimization in Efficient Mixture-of-Experts Large Language Model Inference. - Mu-Chi Chen; Po-Hsuan Huang; Yanwen Gai; Shao-Chun Ho; Cheng Liang; Yu-Hung Kao; Yu-Kai Hung; Chia-Heng Tu; Shih-Hao Hung (RACS, 2025)

SiliconMind-V1: Multi-Agent Distillation and Debug-Reasoning Workflows for Verilog Code Generation. - Mu-Chi Chen; Yu-Hung Kao; Po-Hsuan Huang; Shao-Chun Ho; Hsiang-Yu Tsou; I-Ting Wu; En-Ming Huang; Yu-Kai Hung; Wei-Po Hsin; Cheng Liang; Chia-Heng Tu; Shih-Hao Hung; et al. (CoRR, 2026)

Exploring LLM-based Verilog Code Generation with Data-Efficient Fine-Tuning and Testbench Automation. - Mu-Chi Chen; Po-Hsuan Huang; Yu-Hung Kao; Yen-Fu Liu; Yu-Kai Hung; Cheng Liang; Shao-Chun Ho; Chia-Heng Tu; Shih-Hao Hung (CoRR, 2026)