How close to the CMOS voltage scaling limit for FinFET technology? - Near-threshold computing and stochastic computing. - Runsheng Wang; Xiaobo Jiang; Shaofeng Guo; Ru Huang 001 (ASICON, 2017)

Towards reliability-aware circuit design in nanoscale FinFET technology: - New-generation aging model and circuit reliability simulator. - Shaofeng Guo; Runsheng Wang; Zhuoqing Yu; Peng Hao; Pengpeng Ren; Yangyuan Wang; Siyu Liao; Chunyi Huang; Tianlei Guo; Alvin Chen; Jushan Xie; Ru Huang 001 (ICCAD, 2017)

Layout-dependent aging mitigation for critical path timing. - Che-Lun Hsu; Shaofeng Guo; Yibo Lin; Xiaoqing Xu; Meng Li 004; Runsheng Wang; Ru Huang 001; David Z. Pan (ASP-DAC, 2018)

Investigation on the amplitude coupling effect of random telegraph noise (RTN) in nanoscale FinFETs. - Shaofeng Guo; Zhenghan Lin; Runsheng Wang; Zexuan Zhang; Zhe Zhang 006; Yangyuan Wang; Ru Huang 001 (IRPS, 2018)

Evaluation of SRAM Vmin shift induced by random telegraph noise (RTN): physical understanding and prediction method. - Shaofeng Guo; Zhenghan Lin; Runsheng Wang; Dongyuan Mao; Yangyuan Wang; Ru Huang 001 (ISCAS, 2018)

Investigation on NBTI-induced dynamic variability in nanoscale CMOS devices: Modeling, experimental evidence, and impact on circuits. - Shaofeng Guo; Runsheng Wang; Pengpeng Ren; Changze Liu; Mulong Luo; Xiaobo Jiang; Yangyuan Wang; Ru Huang 001 (Microelectron. Reliab., 2018)

OMI/TMI-based Modeling and Fast Simulation of Random Telegraph Noise (RTN) in Advanced Logic Devices and Circuits. - Runsheng Wang; Zhe Zhang 006; Shaofeng Guo; Qingxue Wang; Dehuang Wu; Joddy Wang; Ru Huang 001 (ASICON, 2019)

Circuit Reliability Comparison Between Stochastic Computing and Binary Computing. - Zuodong Zhang; Runsheng Wang; Zhe Zhang 006; Yawen Zhang; Shaofeng Guo; Ru Huang 001 (IEEE Trans. Circuits Syst., 2020)