A Highly Robust, Low Delay and DNU-Recovery Latch Design for Nanoscale CMOS Technology. - Aibin Yan; Zhen Zhou; Shaojie Wei; Jie Cui 004; Yong Zhou; Tianming Ni; Patrick Girard 001; Xiaoqing Wen (ACM Great Lakes Symposium on VLSI, 2022)

A Low Area and Low Delay Latch Design with Complete Double-Node-Upset-Recovery for Aerospace Applications. - Aibin Yan; Shaojie Wei; Jinjun Zhang; Jie Cui 004; Jie Song; Tianming Ni; Patrick Girard 001; Xiaoqing Wen (ACM Great Lakes Symposium on VLSI, 2023)

Design of Low-Cost Approximate CMOS Full Adders. - Aibin Yan; Shaojie Wei; Zhixing Li; Jie Cui 004; Zhengfeng Huang; Patrick Girard 001; Xiaoqing Wen (ISCAS, 2023)

Design of a Novel Latch with Quadruple-Node-Upset Recovery for Harsh Radiation Hardness. - Aibin Yan; Chao Zhou; Shaojie Wei; Jie Cui 004; Zhengfeng Huang; Patrick Girard 001; Xiaoqing Wen (ITC-Asia, 2023)

Upper record values from the generalized Pareto distribution and associated statistical inference. - Xu Zhao; Shaojie Wei; Weihu Cheng; Pengyue Zhang; Yang Zhang; Qi Xu (Commun. Stat. Simul. Comput., 2023)