High-throughput and area-efficient fully-pipelined hashing cores using BRAM in FPGA. - Lin Li 032; Shaoyu Lin; Shuli Shen; Kongcheng Wu; Xiaochao Li; Yihui Chen (Microprocess. Microsystems, 2019)

A High Throughput and Pipelined Implementation of the LUKS on FPGA. - Xiaochao Li; Kongcheng Wu; Qi Zhang; Shaoyu Lin; Yihui Chen; Shen Yuong Wong (J. Circuits Syst. Comput., 2020)

LTRAG: Enhancing Autoformalization and Self-refinement for Logical Reasoning with Thought-Guided RAG. - Ruikang Hu; Shaoyu Lin; Yeliang Xiu; Yongmei Liu 001 (ACL (Findings), 2025)