FPGA-Based Acceleration of LU decomposition for Analog and RF Circuit Simulation. - Yogesh Mahajan; Shashank Obla; Mini K. Namboothiripad; Mandar J. Datar; Niraj N. Sharma; Sachin B. Patkar (VLSID, 2020)

Pigasus 2.0: making the pigasus IDS robust to attacks and different workloads. - Zhipeng Zhao; Nirav Atre; Hugo Sadok; Siddharth Sahay; Shashank Obla; James C. Hoe; Justine Sherry (SIGCOMM Posters and Demos, 2022)

Exploiting the Common Case When Accelerating Input-Dependent Stream Processing by FPGA. - Zhipeng Zhao; Joseph Melber; Siddharth Sahay; Shashank Obla; Eriko Nurvitadhi; James C. Hoe (IEEE Trans. Computers, 2023)