Accelerating Local Laplacian Filters on FPGAs. - Shashwat Khandelwal; Ziaul Choudhury; Shashwat Shrivastava; Suresh Purini (FPL, 2020)

FPGA Accelerator for Stereo Vision using Semi-Global Matching through Dependency Relaxation. - Shashwat Shrivastava; Ziaul Choudhury; Shashwat Khandelwal; Suresh Purini (FPL, 2020)

An FPGA Overlay for CNN Inference with Fine-grained Flexible Parallelism. - Ziaul Choudhury; Shashwat Shrivastava; Lavanya Ramapantulu; Suresh Purini (ACM Trans. Archit. Code Optim., 2022)

Mitigating the Last-Mile Bottleneck: A Two-Step Approach For Faster Commercial FPGA Routing. - Shashwat Shrivastava; Stefan Nikolic 001; Chirag Ravishankar; Dinesh Gaitonde; Mirjana Stojilovic (FPGA, 2023)

IIBLAST: Speeding Up Commercial FPGA Routing by Decoupling and Mitigating the Intra-CLB Bottleneck. - Shashwat Shrivastava; Stefan Nikolic 001; Chirag Ravishankar; Dinesh Gaitonde; Mirjana Stojilovic (ICCAD, 2023)

Instruction-Level Power Side-Channel Leakage Evaluation of Soft-Core CPUs on Shared FPGAs. - Ognjen Glamocanin; Shashwat Shrivastava; Jinwei Yao; Nour Ardo; Mathias Payer; Mirjana Stojilovic (J. Hardw. Syst. Secur., 2023)

Guaranteed Yet Hard to Find: Uncovering FPGA Routing Convergence Paradox. - Shashwat Shrivastava; Stefan Nikolic 001; Sun Tanaka; Chirag Ravishankar; Dinesh Gaitonde; Mirjana Stojilovic (FCCM, 2025)