A 103 fJ/b/dB, 10-26 Gb/s Receiver With a Dual Feedback Nested Loop CDR for Wide Bandwidth Jitter Tolerance Enhancement. - Yao-Chia Liu; Wei-Zen Chen; Yuan-Sheng Lee; Yu-Hsiang Chen; Shawn Ming; Ying-Hsi Lin (IEEE J. Solid State Circuits, 2023)