Analysis of BiCMOS buffer for input voltages with finite rise time. - Shayan Zhang; T. S. Kalkur (IEEE J. Solid State Circuits, 1994)

Analysis of the switching speed of BiCMOS buffer under high current. - Shayan Zhang; T. S. Kalkur; Steven Lee; Dengyuan Chen (IEEE J. Solid State Circuits, 1994)

A delay model and optimization method of a low-power BiCMOS logic circuit. - Shayan Zhang; T. S. Kalkur; Steven Lee; Lori Gatza (IEEE J. Solid State Circuits, 1994)

A 5GHz 7nm L1 cache memory compiler for high-speed computing and mobile applications. - Michael Clinton; Rajinder Singh; Marty Tsai; Shayan Zhang; Bryan Sheffield; Jonathan Chang (ISSCC, 2018)