Synchoricity and NOCs could make Billion Gate Custom Hardware Centric SOCs Affordable. - Ahmed Hemani; Syed Mohammad Asad Hassan Jafri; Shayesteh Masoumian (NOCS, 2017)

Modeling Static Noise Margin for FinFET based SRAM PUFs. - Shayesteh Masoumian; Georgios N. Selimis; Roel Maes; Geert Jan Schrijen; Said Hamdioui; Mottaqiallah Taouil (ETS, 2020)

Reliability Analysis of FinFET-Based SRAM PUFs for 16nm, 14nm, and 7nm Technology Nodes. - Shayesteh Masoumian; Georgios N. Selimis; Rui Wang; Geert Jan Schrijen; Said Hamdioui; Mottaqiallah Taouil (DATE, 2022)

Modeling and Analysis of SRAM PUF Bias Patterns in 14nm and 7nm FinFET Technology Nodes. - Shayesteh Masoumian; Roel Maes; Rui Wang; Karthik Keni Yerriswamy; Geert Jan Schrijen; Said Hamdioui; Mottaqiallah Taouil (VLSI-SoC, 2023)

Modeling and Analysis of Aging Impact on SRAM PUFs for Advanced FinFET Technology Nodes. - Shayesteh Masoumian; Roel Maes; Noemie Beringuier-Boher; Karthik Keni Yerriswamy; Geert Jan Schrijen; Said Hamdioui; Mottaqiallah Taouil (ETS, 2025)