Efficient Parallel Sorting and Merging Algorithms for Two-Dimensional Mesh-Connected Processor Arrays. - Sy-Yen Kuo; Sheng-Chiech Liang (ICPP (3), 1991)

Design and Evaluation of Fault-Tolerant Interleaved Memory Systems. - Sy-Yen Kuo; Ahmed Louri; Sheng-Chiech Liang (ICPP (1), 1991)

Defect-tolerant hierarchical sorting networks for wafer-scale integration. - Sy-Yen Kuo; Sheng-Chiech Liang (IEEE J. Solid State Circuits, 1991)

Concurrent Error Detection and Correction in Real-Time Systolic Sorting Arrays. - Sy-Yen Kuo; Sheng-Chiech Liang (IEEE Trans. Computers, 1992)