Area and Memory Efficient Architectures for 3D Blu-ray-compliant Multimedia Processors. - Chi-Cheng Ju; Tsu-Ming Liu; Yeh-Lin Chu; Chuang-Chi Chiou; Bin-Jung Tsai; Te-Chi Hsiao; Ginny Chen; Pin-Huan Hsu; Chih-Ming Wang; Chun-Chia Chen; Hue-Min Lin; Chia-Yun Cheng; et al. (ICME, 2012)

A 775-µW/fps/view H.264/MVC decoder chip compliant with 3D Blu-ray specifications. - Chi-Cheng Ju; Tsu-Ming Liu; Yung-Chang Chang; Chih-Ming Wang; Chun-Chia Chen; Hue-Min Lin; Chia-Yun Cheng; Min-Hao Chiu; Sheng-Jen Wang; Ping Chao; Meng-Jye Hu; Hao-Wei Li; et al. (ISCAS, 2012)

A 363-µW/fps power-aware green multimedia processor for mobile applications. - Chi-Cheng Ju; Yung-Chang Chang; Chih-Ming Wang; Chun-Chia Chen; Hue-Min Lin; Chia-Yun Cheng; Fred Chiu; Sheng-Jen Wang; Tsu-Ming Liu; Chung-Hung Tsai (VLSI-DAT, 2012)

A 0.2nJ/pixel 4K 60fps Main-10 HEVC decoder with multi-format capabilities for UHD-TV applications. - Chi-Cheng Ju; Tsu-Ming Liu; Yung-Chang Chang; Chih-Ming Wang; Hue-Min Lin; Chia-Yun Cheng; Chun-Chia Chen; Min-Hao Chiu; Sheng-Jen Wang; Ping Chao; Meng-Jye Hu; Fu-Chun Yeh; et al. (ESSCIRC, 2014)

A 4K×2K@60fps multi-standard TV SoC processor with integrated HDMI/MHL receiver. - Chi-Cheng Ju; Tsu-Ming Liu; Huaide Wang; Yung-Chang Chang; Chih-Ming Wang; Chang-Lin Hsieh; Brian Liu; Hue-Min Lin; Chia-Yun Cheng; Chun-Chia Chen; Min-Hao Chiu; Sheng-Jen Wang; et al. (VLSIC, 2014)

Energy and area efficient hardware implementation of 4K Main-10 HEVC decoder in Ultra-HD Blu-ray player and TV systems. - Tsu-Ming Liu; Yung-Chang Chang; Chih-Ming Wang; Hue-Min Lin; Chia-Yun Cheng; Chun-Chia Chen; Min-Hao Chiu; Sheng-Jen Wang; Ping Chao; Meng-Jye Hu; Fu-Chun Yeh; Shun-Hsiang Chuang; et al. (ICME, 2015)

18.6 A 0.5nJ/pixel 4K H.265/HEVC codec LSI for multi-format smartphone applications. - Chi-Cheng Ju; Tsu-Ming Liu; Kun-Bin Lee; Yung-Chang Chang; Han-Liang Chou; Chih-Ming Wang; Tung-Hsing Wu; Hue-Min Lin; Yi-Hsin Huang; Chia-Yun Cheng; Ting-An Lin; Chun-Chia Chen; et al. (ISSCC, 2015)

A 2.6mm2 0.19nJ/pixel VP9 and multi-standard decoder LSI for Android 4K TV applications. - Chi-Cheng Ju; Tsu-Ming Liu; Yung-Chang Chang; Chih-Ming Wang; Chia-Yun Cheng; Hue-Min Lin; Chun-Chia Chen; Min-Hao Chiu; Ping Chao; Ming-Long Wu; Meng-Jye Hu; Sheng-Jen Wang; et al. (ESSCIRC, 2016)

A 0.5 nJ/Pixel 4 K H.265/HEVC Codec LSI for Multi-Format Smartphone Applications. - Chi-Cheng Ju; Tsu-Ming Liu; Kun-Bin Lee; Yung-Chang Chang; Han-Liang Chou; Chih-Ming Wang; Tung-Hsing Wu; Hue-Min Lin; Yi-Hsin Huang; Chia-Yun Cheng; Ting-An Lin; Chun-Chia Chen; et al. (IEEE J. Solid State Circuits, 2016)