Detailed-Routability-Driven Analytical Placement for Mixed-Size Designs with Technology and Region Constraints. - Chau-Chin Huang; Hsin-Ying Lee; Bo-Qiao Lin; Sheng-Wei Yang; Chin-Hao Chang; Szu-To Chen; Yao-Wen Chang (ICCAD, 2015)

Blockage-aware terminal propagation for placement wirelength minimization. - Sheng-Wei Yang; Yao-Wen Chang; Tung-Chieh Chen (ICCAD, 2017)

NTUplace4dr: A Detailed-Routing-Driven Placer for Mixed-Size Circuit Designs With Technology and Region Constraints. - Chau-Chin Huang; Hsin-Ying Lee; Bo-Qiao Lin; Sheng-Wei Yang; Chin-Hao Chang; Szu-To Chen; Yao-Wen Chang; Tung-Chieh Chen; Ismail Bustany (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

2024 ICCAD CAD Contest Problem B: Power and Timing Optimization Using Multibit Flip-Flop. - Sheng-Wei Yang; Jhih-Wei Hsu; Ting-Wei Lee; Tzu-Hsuan Chen; Cindy Chin-Fang Shen (ICCAD, 2024)