A Full-System VM-HDL Co-Simulation Framework for Servers with PCIe-Connected FPGAs. - Shenghsun Cho; Mrunal Patel; Han Chen; Michael Ferdman; Peter A. Milder (FPGA, 2018)

FPGASwarm: High Throughput Model Checking on FPGAs. - Shenghsun Cho; Michael Ferdman; Peter A. Milder (FPL, 2018)

Taming the Killer Microsecond. - Shenghsun Cho; Amoghavarsha Suresh; Tapti Palit; Michael Ferdman; Nima Honarmand (MICRO, 2018)

Runtime-Programmable Pipelines for Model Checkers on FPGAs. - Mrunal Patel; Shenghsun Cho; Michael Ferdman; Peter A. Milder (FPL, 2019)

Flick: Fast and Lightweight ISA-Crossing Call for Heterogeneous-ISA Environments. - Shenghsun Cho; Han Chen; Sergey Madaminov; Michael Ferdman; Peter A. Milder (ISCA, 2020)

Swarm model checking on the GPU. - Richard DeFrancisco; Shenghsun Cho; Michael Ferdman; Scott A. Smolka (Int. J. Softw. Tools Technol. Transf., 2020)

Practical Model Checking on FPGAs. - Shenghsun Cho; Mrunal Patel; Michael Ferdman; Peter A. Milder (ACM Trans. Reconfigurable Technol. Syst., 2021)

Waverunner: An Elegant Approach to Hardware Acceleration of State Machine Replication. - Mohammadreza Alimadadi; Hieu Mai; Shenghsun Cho; Michael Ferdman; Peter A. Milder; Shuai Mu 001 (NSDI, 2023)

A VM-HDL Co-Simulation Framework for Systems with PCIe-Connected FPGAs. - Shenghsun Cho; Mrunal Patel; Basavaraj Kaladagi; Han Chen; Tapti Palit; Michael Ferdman; Peter A. Milder (CoRR, 2025)