A None-Sparse Inference Accelerator that Distills and Reuses the Computation Redundancy in CNNs. - Ying Wang 001; Shengwen Liang; Huawei Li 001; Xiaowei Li 001 (DAC, 2019)

InS-DLA: An In-SSD Deep Learning Accelerator for Near-Data Processing. - Shengwen Liang; Ying Wang 001; Cheng Liu 008; Huawei Li 001; Xiaowei Li 001 (FPL, 2019)

Cognitive SSD: A Deep Learning Engine for In-Storage Data Retrieval. - Shengwen Liang; Ying Wang 001; Youyou Lu; Zhe Yang 012; Huawei Li 001; Xiaowei Li 001 (USENIX ATC, 2019)

DeepBurning-GL: an Automated Framework for Generating Graph Neural Network Accelerators. - Shengwen Liang; Cheng Liu 008; Ying Wang 001; Huawei Li 001; Xiaowei Li 001 (ICCAD, 2020)

The 2020 Low-Power Computer Vision Challenge. - Xiao Hu 004; Ming-Ching Chang; Yuwei Chen; Rahul Sridhar; Zhenyu Hu; Yunhe Xue; Zhenyu Wu 002; Pengcheng Pi; Jiayi Shen; Jianchao Tan; Xiangru Lian; Ji Liu 002; et al. (AICAS, 2021)

GCiM: A Near-Data Processing Accelerator for Graph Construction. - Lei He 016; Cheng Liu 008; Ying Wang 001; Shengwen Liang; Huawei Li 001; Xiaowei Li 001 (DAC, 2021)

GLIST: Towards In-Storage Graph Learning. - Cangyuan Li; Ying Wang 001; Cheng Liu 008; Shengwen Liang; Huawei Li 001; Xiaowei Li 001 (USENIX ATC, 2021)

EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks. - Shengwen Liang; Ying Wang 001; Cheng Liu 008; Lei He 016; Huawei Li 001; Dawen Xu 002; Xiaowei Li 001 (IEEE Trans. Computers, 2021)

VStore: in-storage graph based vector search accelerator. - Shengwen Liang; Ying Wang 001; Ziming Yuan; Cheng Liu 008; Huawei Li 001; Xiaowei Li 001 (DAC, 2022)

Cognitive SSD+: a deep learning engine for energy-efficient unstructured data retrieval. - Shengwen Liang; Ying Wang 001; Huawei Li 001; Xiaowei Li 001 (CCF Trans. High Perform. Comput., 2022)

Intelligent Automatic Test Pattern Generation for Digital Circuits Based on Reinforcement Learning. - Wenxing Li; Hongqin Lyu; Shengwen Liang; Tiancheng Wang; Pengyu Tian; Huawei Li 001 (ATS, 2023)

Energy-efficient NTT Design with One-bank SRAM and 2-D PE Array. - Jianan Mu; Huajie Tan; Jiawen Wu; Haotian Lu 002; Chip-Hong Chang; Shuai Chen; Shengwen Liang; Jing Ye 001; Huawei Li 001; Xiaowei Li 001 (DATE, 2023)

PANG: A Pattern-Aware GCN Accelerator for Universal Graphs. - Yibo Du; Ying Wang 001; Shengwen Liang; Huawei Li 001; Xiaowei Li 001; Yinhe Han 001 (ICCD, 2023)

ChipGPT: How far are we from natural language hardware design. - Kaiyan Chang; Ying Wang 001; Haimeng Ren; Mengdi Wang; Shengwen Liang; Yinhe Han 001; Huawei Li 001; Xiaowei Li 001 (CoRR, 2023)

APoX: Accelerate Graph-Based Deep Point Cloud Analysis via Adaptive Graph Construction. - Lei Dai; Shengwen Liang; Ying Wang 001; Huawei Li 001; Xiaowei Li 001 (ASPDAC, 2024)

Data is all you need: Finetuning LLMs for Chip Design via an Automated design-data augmentation framework. - Kaiyan Chang; Kun Wang 055; Nan Yang; Ying Wang 001; Dantong Jin; Wenlong Zhu; Zhirong Chen; Cangyuan Li; Hao Yan; Yunhao Zhou; Zhuoliang Zhao; Yuan Cheng; et al. (DAC, 2024)

Chiplever: Towards Effortless Extension of Chiplet-based System for FHE. - Yibo Du; Ying Wang 001; Bing Li 017; Fuping Li; Shengwen Liang; Huawei Li 001; Xiaowei Li 001; Yinhe Han 001 (DAC, 2024)

SmartATPG: Learning-based Automatic Test Pattern Generation with Graph Convolutional Network and Reinforcement Learning. - Wenxing Li; Hongqin Lyu; Shengwen Liang; Tiancheng Wang; Huawei Li 001 (DAC, 2024)

Alchemist: A Unified Accelerator Architecture for Cross-Scheme Fully Homomorphic Encryption. - Jianan Mu; Husheng Han; Shangyi Shi; Jing Ye 001; Zizhen Liu; Shengwen Liang; Meng Li 004; Mingzhe Zhang; Song Bian 001; Xing Hu 001; Huawei Li 001; Xiaowei Li 001 (DAC, 2024)

GPACE: An Energy-Efficient PQ-Based GCN Accelerator with Redundancy Reduction. - Yibo Du; Shengwen Liang; Ying Wang 001; Huawei Li 001; Xiaowei Li 001; Yinhe Han 001 (DATE, 2024)

HyQA: Hybrid Near-Data Processing Platform for Embedding Based Question Answering System. - Shengwen Liang; Ziming Yuan; Ying Wang 001; Dawen Xu 002; Huawei Li 001; Xiaowei Li 001 (DATE, 2024)

Natural language is not enough: Benchmarking multi-modal generative AI for Verilog generation. - Kaiyan Chang; Zhirong Chen; Yunhao Zhou; Wenlong Zhu; Kun Wang 055; Haobo Xu; Cangyuan Li; Mengdi Wang; Shengwen Liang; Huawei Li 001; Yinhe Han 001; Ying Wang 001 (ICCAD, 2024)

AGC: A Unified Architecture for Accelerating K-Nearest Neighbor Graph Construction in Vector Search. - Lei Dai; Ziming Yuan; Wen Li; Shengwen Liang; Kaiwei Zou; Ying Wang 001; Cheng Liu 008; Huawei Li 001; Xiaowei Li 001 (ICCAD, 2024)

Flagger: Cooperative Acceleration for Large-Scale Cross-Silo Federated Learning Aggregation. - Xiurui Pan; Yuda An; Shengwen Liang; Bo Mao; Mingzhe Zhang; Qiao Li 001; Myoungsoo Jung; Jie Zhang 048 (ISCA, 2024)

Cambricon-LLM: A Chiplet-Based Hybrid Architecture for On-Device Inference of 70B LLM. - Zhongkai Yu; Shengwen Liang; Tianyun Ma; Yunke Cai; Ziyuan Nan; Di Huang; Xinkai Song; Yifan Hao 001; Jie Zhang 048; Tian Zhi; Yongwei Zhao; Zidong Du; et al. (MICRO, 2024)

Graphitron: A Domain Specific Language for FPGA-based Graph Processing Accelerator Generation. - Xinmiao Zhang 004; Zheng Feng; Shengwen Liang; Xinyu Chen 001; Cheng Liu 008; Huawei Li 001; Xiaowei Li 001 (CoRR, 2024)

InstInfer: In-Storage Attention Offloading for Cost-Effective Long-Context LLM Inference. - Xiurui Pan; Endian Li; Qiao Li 001; Shengwen Liang; Yizhou Shan; Ke Zhou 001; Yingwei Luo; Xiaolin Wang 001; Jie Zhang 048 (CoRR, 2024)

DRIM-ANN: An Approximate Nearest Neighbor Search Engine based on Commercial DRAM-PIMs. - Mingkai Chen; Tianhua Han; Cheng Liu 008; Shengwen Liang; Kuai Yu; Lei Dai; Ziming Yuan; Ying Wang 001; Lei Zhang 008; Huawei Li 001; Xiaowei Li 001 (CoRR, 2024)

An Energy-Efficient In-Memory Accelerator for Graph Construction and Updating. - Mingkai Chen; Cheng Liu 008; Shengwen Liang; Lei He 016; Ying Wang 001; Lei Zhang 008; Huawei Li 001; Xiaowei Li 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

ERASER: Efficient RTL FAult Simulation Framework with Trimmed Execution Redundancy. - Jiaping Tang; Jianan Mu; Silin Liu; Zizhen Liu; Feng Gu; Xinyu Zhang; Leyan Wang; Shengwen Liang; Jing Ye 001; Huawei Li 001; Xiaowei Li 001 (DATE, 2025)

InstAttention: In-Storage Attention Offloading for Cost-Effective Long-Context LLM Inference. - Xiurui Pan; Endian Li; Qiao Li 001; Shengwen Liang; Yizhou Shan; Ke Zhou 001; Yingwei Luo; Xiaolin Wang 001; Jie Zhang 048 (HPCA, 2025)

NeuVSA: A Unified and Efficient Accelerator for Neural Vector Search. - Ziming Yuan; Lei Dai; Wen Li; Jie Zhang 048; Shengwen Liang; Ying Wang 001; Cheng Liu 008; Huawei Li 001; Xiaowei Li 001; Jiafeng Guo; Peng Wang 037; Renhai Chen; et al. (HPCA, 2025)

FrontOrder: Frontier-Guided Graph Reordering. - Xinmiao Zhang 004; Cheng Liu 008; Shengwen Liang; Chenwei Xiong; Yu Zhang 027; Lei Zhang 008; Huawei Li 001; Xiaowei Li 001 (ICDE, 2025)

Taijigraph: an Out-Of-Core Graph Processing System Enhanced with Computational Storage. - Xinmiao Zhang 004; Cheng Liu 008; Shengwen Liang; Hayden Kwok-Hay So; Ying Wang 001; Lei Zhang 008; Huawei Li 001; Xiaowei Li 001 (IPDPS, 2025)

XHarvest: Rethinking High-Performance and Cost-Efficient SSD Architecture with CXL-Driven Harvesting. - Li Peng; Wenbo Wu; Shushu Yi; Xianzhang Chen; Chenxi Wang; Shengwen Liang; Zhe Wang 017; Nong Xiao 001; Qiao Li 001; Mingzhe Zhang; Jie Zhang 048 (ISCA, 2025)

Graphitron: A Domain Specific Language for FPGA-Based Graph Processing Accelerator Generation. - Xinmiao Zhang 004; Zheng Feng; Shengwen Liang; Xinyu Chen 001; Lei Zhang 008; Cheng Liu 008 (LCTES, 2025)

Frontier-guided Graph Reordering. - Xinmiao Zhang 004; Cheng Liu 008; Shengwen Liang; Chenwei Xiong; Yu Zhang 027; Lei Zhang 008; Huawei Li 001; Xiaowei Li 001 (PPoPP, 2025)

HighTPI: A Hierarchical Graph Based Intelligent Method for Test Point Insertion. - Zhiteng Chao; Bin Sun; Hongqin Lyu; Ge Yu; Minjun Wang; Wenxing Li; Zizhen Liu; Jianan Mu; Shengwen Liang; Jing Ye 001; Xiaowei Li 001; Huawei Li 001 (VTS, 2025)

APoX-M: Accelerate deep point cloud analysis via adaptive graph construction. - Lei Dai; Shengwen Liang; Ying Wang 001; Huawei Li 001; Xiaowei Li 001 (Integr., 2025)

CodeV-R1: Reasoning-Enhanced Verilog Generation. - Yaoyu Zhu; Di Huang; Han-Qi Lyu; Xiaoyun Zhang; Chongxiao Li; Wenxuan Shi; Yutong Wu; Jianan Mu; Jinghua Wang; Yang Zhao 013; Pengwei Jin; Shuyao Cheng; et al. (CoRR, 2025)

Large Processor Chip Model. - Kaiyan Chang; Mingzhi Chen; Yunji Chen; Zhirong Chen; Dongrui Fan; Junfeng Gong; Nan Guo; Yinhe Han 001; Qinfen Hao; Shuo Hou; Xuanjing Huang 001; Pengwei Jin; et al. (CoRR, 2025)

QiMeng: Fully Automated Hardware and Software Design for Processor Chip. - Rui Zhang 040; Yuanbo Wen; Shuyao Cheng; Di Huang; Shaohui Peng; Jiaming Guo; Pengwei Jin; Jiacheng Zhao; Tianrui Ma; Yaoyu Zhu; Yifan Hao 001; Yongwei Zhao; et al. (CoRR, 2025)