7.10 A 200MP ${0. 6 1} { mu} mathrm{m}$-Pixel-Pitch CMOS Imager with Sub-1e Readout Noise Using Interlaced-Shared Transistor Architecture and On-Chip Motion Artifact-Free HDR Synthesis for 8K Video Applications. - Richard Xu; Guanjing Ren; Yaowu Mo; Dekui Qi; Qian Wang; Shengxin Zhang (ISSCC, 2026)