Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization. - Amin Farmahini Farahani; Shervin Vakili; Sied Mehdi Fakhraie; Saeed Safari; Caro Lucas (Eng. Appl. Artif. Intell., 2010)

Evolvable multi-processor: A novel MPSoC architecture with evolvable task decomposition and scheduling. - Shervin Vakili; Sied Mehdi Fakhraie; Siamak Mohammadi (IET Comput. Digit. Tech., 2010)

Customized embedded processor design for global photographic tone mapping. - Shervin Vakili; Diana Carolina Gil; J. M. Pierre Langlois; Yvon Savaria; Guy Bois (ICECS, 2011)

Finite-precision error modeling using affine arithmetic. - Shervin Vakili; J. M. Pierre Langlois; Guy Bois (ICASSP, 2013)

Customised soft processor design: a compromise between architecture description languages and parameterisable processors. - Shervin Vakili; J. M. Pierre Langlois; Guy Bois (IET Comput. Digit. Tech., 2013)

Enhanced Precision Analysis for Accuracy-Aware Bit-Width Optimization Using Affine Arithmetic. - Shervin Vakili; J. M. Pierre Langlois; Guy Bois (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013)

Designing customized microprocessors for fixed-point computation. - Shervin Vakili; J. M. Pierre Langlois; Guy Bois (AHS, 2015)

Memory-Efficient String Matching for Intrusion Detection Systems using a High-Precision Pattern Grouping Algorithm. - Shervin Vakili; J. M. Pierre Langlois; Bochra Boughzala; Yvon Savaria (ANCS, 2016)

Accuracy-aware processor customisation for fixed-point arithmetic. - Shervin Vakili; J. M. Pierre Langlois; Guy Bois (IET Comput. Digit. Tech., 2016)

Scalable memory-less architecture for string matching with FPGAs. - Ideh Sarbishei; Shervin Vakili; J. M. Pierre Langlois; Yvon Savaria (ISCAS, 2017)

Power Reduction in CNN Pooling Layers with a Preliminary Partial Computation Strategy. - Mehdi Ahmadi; Shervin Vakili; J. M. Pierre Langlois; Warren J. Gross (NEWCAS, 2018)

Enhanced Bloom filter utilisation scheme for string matching using a splitting approach. - Shervin Vakili; J. M. Pierre Langlois; Yvon Savaria; Naraig Manjikian (IET Commun., 2018)

An Energy-Efficient Accelerator Architecture with Serial Accumulation Dataflow for Deep CNNs. - Mehdi Ahmadi; Shervin Vakili; J. M. Pierre Langlois (NEWCAS, 2020)

Heterogeneous Distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators. - Mehdi Ahmadi; Shervin Vakili; J. M. Pierre Langlois (NEWCAS, 2020)

CARLA: A Convolution Accelerator With a Reconfigurable and Low-Energy Architecture. - Mehdi Ahmadi; Shervin Vakili; J. M. Pierre Langlois (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

DSCAM+: Latency-Guaranteed FPGA-Based Content Addressable Memory for SDN-Enabled Forwarding Plane. - Shervin Vakili (HPCC/DSS/SmartCity/DependSys, 2023)

A Cost-Effective FPGA-Based Approximate Multiplier for Machine Learning Acceleration. - Anees Rehman; Shervin Vakili (PAAP, 2023)

Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration. - Shervin Vakili; Mobin Vaziri; Amirhossein Zarei; J. M. Pierre Langlois (CoRR, 2023)

A Cost-Effective Baugh-Wooley Approximate Multiplier for FPGA-based Machine Learning Computing. - Shervin Vakili (AICAS, 2024)

HENNC: Hardware Engine for Artificial Neural Network-Based Chaotic Oscillators. - Mobin Vaziri; Shervin Vakili; M. Mehdi Rahimifar; J. M. Pierre Langlois (HPEC, 2024)

DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs. - Shervin Vakili; Amirhossein Zarei (IEEE Embed. Syst. Lett., 2024)

DyRecMul: Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration. - Shervin Vakili; Mobin Vaziri; Amirhossein Zarei; J. M. Pierre Langlois (ACM Trans. Reconfigurable Technol. Syst., 2025)