A Real-Time Software Platform for the Cell Processor. - Seiji Maeda; Shigehiro Asano; Tomofumi Shimada; Koichi Awazu; Haruyuki Tago (IEEE Micro, 2005)

An implementation of hardware accelerator using dynamically reconfigurable architecture. - Takashi Yoshikawa; Yutaka Yamada; Shigehiro Asano (Hot Chips Symposium, 2006)

The microarchitecture of the synergistic processor for a cell processor. - Brian K. Flachs; Shigehiro Asano; Sang H. Dhong; H. Peter Hofstee; Gilles Gervais; Roy Kim; Tien Le; Peichun Liu; Jens Leenstra; John S. Liberty; Brad W. Michael; Hwa-Joon Oh; et al. (IEEE J. Solid State Circuits, 2006)

Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI. - Brian K. Flachs; Shigehiro Asano; Sang H. Dhong; H. Peter Hofstee; Gilles Gervais; Roy Kim; Tien Le; Peichun Liu; Jens Leenstra; John S. Liberty; Brad W. Michael; Hwa-Joon Oh; et al. (IBM J. Res. Dev., 2007)

Mapping method for dynamically reconfigurable architecture. - Akira Kuroda; Mayuko Koezuka; Hidenori Matsuzaki; Takashi Yoshikawa; Shigehiro Asano (ASP-DAC, 2009)

FlexGrip™: A small and high-performance programmable hardware for highly sequential application. - Takashi Yoshikawa; Fumihiko Hyuga; Masayuki Tokunaga; Yutaka Yamada; Shigehiro Asano (COOL Chips, 2011)