Priority Assignment Control of ATM Line Buffers with Multiple QOS Classes. - Yasushi Takagi; Shigeki Hino; Tatsuro Takahashi (IEEE J. Sel. Areas Commun., 1991)

Asynchronous transfer mode switching LSI chips with 10-Gb/s serial I/O ports. - Shigeki Hino; Minoru Togashi; Kimiyoshi Yamasaki (IEEE J. Solid State Circuits, 1995)

3.5-Gb/s⨉4-ch Si bipolar LSI's for optical interconnections. - Noboru Ishihara; Shuichi Fujita; Minoru Togashi; Shigeki Hino; Yoshimitsu Arai; Nobuyuki Tanaka; Yoshiji Kobayashi; Yukio Akazawa (IEEE J. Solid State Circuits, 1995)

Design of Photonic ATM Switch and a Rack-Mounted Prototype. - Tohru Matsunaga; Keishi Habara; Akira Misawa; Yoshiaki Yamada; Toru Okugawa; Masato Tsukada; Shigeki Hino; Koji Sasayama; Ken-ichi Yukimatsu (ICC (3), 1997)