Construction of up-down-type and shift-register-type counters using ternary flip-flop circuits. - Noriaki Muranaka; Shigeru Imanishi (Syst. Comput. Jpn., 1985)

Decimal Addition and Subtraction Units Using the p-Valued Decimal Signed-Digit Number Representation. - Noriaki Muranaka; Shigeru Imanishi; D. Michael Miller (ISMVL, 1993)

A Ternary Systolic Product-Sum Circuit for GF(3m) using Neuron MOSFETs. - Noriaki Muranaka; Shigenobu Arai; Shigeru Imanishi; D. Michael Miller (ISMVL, 1996)

Membership Functions in Automatic Harmonization System. - Masataka Tokumaru; Kazumi Yamashita; Noriaki Muranaka; Shigeru Imanishi (ISMVL, 1998)

Virtual Stylist Project - Dress Up Support System Considering User's Subjectivity. - Masataka Tokumaru; Toshihiko Fujibayashi; Noriaki Muranaka; Shigeru Imanishi (FSKD, 2002)

Color design support system considering color harmony. - Masataka Tokumaru; Noriaki Muranaka; Shigeru Imanishi (FUZZ-IEEE, 2002)

Virtual Stylist project - examination of adapting clothing search system to user's subjectivity with interactive genetic algorithms. - Masataka Tokumaru; Noriaki Muranaka; Shigeru Imanishi (IEEE Congress on Evolutionary Computation, 2003)

Multiple-valued image-contour extraction method using a Laplacian- Gaussian filter. - Noriaki Muranaka; Shinya Kudoh; Takanori Ashida; Masataka Tokumaru; Shigeru Imanishi (Syst. Comput. Jpn., 2007)