An experimental DRAM with a NAND-structured cell. - Takehiro Hasegawa; Daisaburo Takashima; Ryu Ogiwara; Masako Ohta; Shinichiro Shiratake; Takeshi Hamamoto; Takashi Yamada; Masami Aoki; Shigeru Ishibashi; Yukihito Oowaki; Shigeyoshi Watanabe; Fujio Masuoka (IEEE J. Solid State Circuits, 1993)