The realization of a mismatch-free and 1.5-bit over-sampling pipelined ADC. - Shigeto Tanaka; Yuji Gohda; Yasuhiro Sugimoto (ISCAS (6), 2005)

A Study to Realize a CMOS Pipelined Current-Mode A-to-D Converter for Video Applications. - Yasuhiro Sugimoto; Yuji Gohda; Shigeto Tanaka (IEICE Trans. Electron., 2006)

A Digitally Assisted Gain and Offset Error Cancellation Technique for a CMOS Pipelined ADC with a 1.5-bit Bit-Block Architecture. - Hiroki Sakurai; Shigeto Tanaka; Yasuhiro Sugimoto (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)