CMOS scaling into the nanometer regime. - Yuan Taur; Douglas A. Buchanan; Wei Chen; David J. Frank; Khalid E. Ismail; Shih-Hsien Lo; George A. Sai-Halasz; Raman G. Viswanathan; Hsing-Jen C. Wann; Shalom J. Wind; Hon-Sum Philip Wong (Proc. IEEE, 1997)

Modeling and characterization of quantization, polysilicon depletion, and direct tunneling effects in MOSFETs with ultrathin oxides. - Shih-Hsien Lo; Douglas A. Buchanan; Yuan Taur (IBM J. Res. Dev., 1999)

Modeling and Analysis of Gate Leakage in Ultra-thin Oxide Sub-50nm Double Gate Devices and Circuits. - Saibal Mukhopadhyay; Keunwoo Kim; Jae-Joon Kim; Shih-Hsien Lo; Rajiv V. Joshi; Ching-Te Chuang; Kaushik Roy 001 (ISQED, 2005)

High Performance MTCMOS Technique for Leakage Reduction in Hybrid SOI-Epitaxial Technologies with Enhanced-Mobility PFET Header. - Koushik K. Das; Shih-Hsien Lo; Ching-Te Chuang (VLSI Design, 2006)

Estimation of gate-to-channel tunneling current in ultra-thin oxide sub-50nm double gate devices. - Saibal Mukhopadhyay; Keunwoo Kim; Jae-Joon Kim; Shih-Hsien Lo; Rajiv V. Joshi; Ching-Te Chuang; Kaushik Roy 001 (Microelectron. J., 2007)

Compact modeling of quantum effects in symmetric double-gate MOSFETs. - Wei Wang; Huaxin Lu; Jooyoung Song; Shih-Hsien Lo; Yuan Taur (Microelectron. J., 2010)

Across the Stack Opportunities for Deep Learning Acceleration. - Vijayalakshmi Srinivasan; Bruce M. Fleischer; Sunil Shukla; Matthew M. Ziegler; Joel Silberman; Jinwook Oh; Jungwook Choi; Silvia M. Mueller; Ankur Agrawal; Tina Babinsky; Nianzheng Cao; Chia-Yu Chen; et al. (ISLPED, 2018)

A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference. - Bruce M. Fleischer; Sunil Shukla; Matthew M. Ziegler; Joel Silberman; Jinwook Oh; Vijayalakshmi Srinivasan; Jungwook Choi; Silvia M. Mueller; Ankur Agrawal; Tina Babinsky; Nianzheng Cao; Chia-Yu Chen; et al. (VLSI Circuits, 2018)

A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference. - Jinwook Oh; Sae Kyu Lee; Mingu Kang; Matthew M. Ziegler; Joel Silberman; Ankur Agrawal; Swagath Venkataramani; Bruce M. Fleischer; Michael Guillorn; Jungwook Choi; Wei Wang 333; Silvia M. Mueller; et al. (VLSI Circuits, 2020)

Efficient AI System Design With Cross-Layer Approximate Computing. - Swagath Venkataramani; Xiao Sun 013; Naigang Wang; Chia-Yu Chen; Jungwook Choi; Mingu Kang; Ankur Agarwal; Jinwook Oh; Shubham Jain; Tina Babinsky; Nianzheng Cao; Thomas W. Fox; et al. (Proc. IEEE, 2020)