A Study on Layer Connection Strategies in Stacked Convolutional Deep Belief Networks. - Lei Guo 029; Shijie Li 002; Xin Niu 002; Yong Dou (CCPR (1), 2014)

Optimized GPU Acceleration Algorithm of Convolutional Neural Networks for Target Detection. - Shijie Li 002; Yong Dou; Qi Lv; Qiang Wang 006; Xin Niu 002; Ke Yang 004 (HPCC/SmartCity/DSS, 2016)

Multi-view clustering with extreme learning machine. - Qiang Wang 006; Yong Dou; Xinwang Liu 002; Qi Lv; Shijie Li 002 (Neurocomputing, 2016)

A fast and memory saved GPU acceleration algorithm of convolutional neural networks for target detection. - Shijie Li 002; Yong Dou; Xin Niu 002; Qi Lv; Qiang Wang 006 (Neurocomputing, 2017)

Heterogeneous blocked CPU-GPU accelerate scheme for large scale extreme learning machine. - Shijie Li 002; Xin Niu 002; Yong Dou; Qi Lv; Yueqing Wang (Neurocomputing, 2017)

mmCNN: A Novel Method for Large Convolutional Neural Network on Memory-Limited Devices. - Shijie Li 002; Yong Dou; Jinwei Xu; Qiang Wang 006; Xin Niu 002 (COMPSAC (1), 2018)

Deep Image Clustering Using Convolutional Autoencoder Embedding with Inception-Like Block. - Qiang Wang 006; Jiaqing Xu; Rongchun Li; Peng Qiao; Ke Yang 004; Shijie Li 002; Yong Dou (ICIP, 2018)

Frame Segmentation Networks for Temporal Action Localization. - Ke Yang 004; Peng Qiao; Qiang Wang 006; Shijie Li 002; Xin Niu 002; Dongsheng Li 001; Yong Dou (PCM (2), 2018)

GBCNN: A Full GPU-Based Batch Multi-Task Cascaded Convolutional Networks. - Shijie Li 002; Yong Dou; Jinwei Xu; Ke Yang 004; Rongchun Li (IEEE Access, 2019)

A Novel Memory-Scheduling Strategy for Large Convolutional Neural Network on Memory-Limited Devices. - Shijie Li 002; Xiaolong Shen; Yong Dou; Shi-Ce Ni; Jinwei Xu; Ke Yang 004; Qiang Wang 006; Xin Niu 002 (Comput. Intell. Neurosci., 2019)

Exploring frame segmentation networks for temporal action localization. - Ke Yang 004; Xiaolong Shen; Peng Qiao; Shijie Li 002; Dongsheng Li 001; Yong Dou (J. Vis. Commun. Image Represent., 2019)

A Simplified Speaker Recognition System Based on FPGA Platform. - Jinwei Xu; Shijie Li 002; Jingfei Jiang; Yong Dou (IEEE Access, 2020)

MST: Topology-Aware Message Aggregation for Exascale Graph Processing of Traversal-Centric Algorithms. - Xinbiao Gan; Tiejun Li; Feng Xiong; Bo Yang 023; Xinhai Chen; Chunye Gong; Shijie Li 002; Kai Lu 001; Qiao Li 001; Yiming Zhang 003 (ACM Trans. Archit. Code Optim., 2024)

A Novel High-Speed Adaptive Duobinary Digital Detector Based on the Feed-Forward Equalizer and the Maximum Likelihood Sequence Detector for Wireline Transceivers. - Chaolong Xu; Fangxu Lv; Mingche Lai; Xingyun Qi; Qiang Wang 006; Zhang Luo; Shijie Li 002; Geng Zhang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2025)