Shijie Zhou
Orcid: 0000-0002-9677-9594Affiliations:
- Microsoft Corporation, Redmond, USA
- University of Southern California, Los Angeles, CA, USA (PhD 2018)
According to our database1,
Shijie Zhou
authored at least 28 papers
between 2013 and 2020.
Collaborative distances:
Collaborative distances:
Timeline
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Bibliography
2020
IEEE Trans. Parallel Distributed Syst., 2020
2019
IEEE Trans. Parallel Distributed Syst., 2019
2018
FASTCF: FPGA-based Accelerator for STochastic-Gradient-Descent-based Collaborative Filtering.
Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018
Proceedings of the 15th ACM International Conference on Computing Frontiers, 2018
2017
bitFA: A Novel Data Structure for Fast and Update-friendly Regular Expression Matching.
Proceedings of the Posters and Demos Proceedings of the Conference of the ACM Special Interest Group on Data Communication, 2017
Proceedings of the 29th International Symposium on Computer Architecture and High Performance Computing, 2017
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017
Proceedings of the 2017 IEEE High Performance Extreme Computing Conference, 2017
2016
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016
2015
Proceedings of the Handbook on Data Centers, 2015
A Decomposition-Based Approach for Scalable Many-Field Packet Classification on Multi-core Processors.
Int. J. Parallel Program., 2015
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
Proceedings of the 2015 IEEE Global Communications Conference, 2015
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015
Optimizing Many-field Packet Classification on FPGA, Multi-core General Purpose Processor, and GPU.
Proceedings of the Eleventh ACM/IEEE Symposium on Architectures for networking and communications systems, 2015
2014
J. Supercomput., 2014
Proceedings of the third workshop on Hot topics in software defined networking, 2014
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing, 2014
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014
A flexible and scalable high-performance OpenFlow switch on heterogeneous SoC platforms.
Proceedings of the IEEE 33rd International Performance Computing and Communications Conference, 2014
Performance modeling and optimizations for decomposition-based large-scale packet classification on multi-core processors.
Proceedings of the IEEE 15th International Conference on High Performance Switching and Routing, 2014
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014
Proceedings of the IEEE High Performance Extreme Computing Conference, 2014
2013
Proceedings of the 25th International Symposium on Computer Architecture and High Performance Computing, 2013
High-performance architecture for dynamically updatable packet classification on FPGA.
Proceedings of the Symposium on Architecture for Networking and Communications Systems, 2013